Heat dissipation assembly
Abstract
A heat dissipating assembly including a layered stack of materials with a highly thermally conductive path for cooling a circuit, the stack including a structurally isolated material having a high coefficient of thermal expansion connected between materials having low coefficients of thermal expansion.
- Inventors:
- Issue Date:
- Research Org.:
- Kansas City Plant (KCP), Kansas City, MO (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1650775
- Patent Number(s):
- 10622277
- Application Number:
- 16/006,227
- Assignee:
- Honeywell Federal Manufacturing & Technologies, LLC (Kansas City, MO)
- Patent Classifications (CPCs):
-
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
- DOE Contract Number:
- NA0000622
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 06/12/2018
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 36 MATERIALS SCIENCE; 42 ENGINEERING
Citation Formats
Johnson, Matthew. Heat dissipation assembly. United States: N. p., 2020.
Web.
Johnson, Matthew. Heat dissipation assembly. United States.
Johnson, Matthew. Tue .
"Heat dissipation assembly". United States. https://www.osti.gov/servlets/purl/1650775.
@article{osti_1650775,
title = {Heat dissipation assembly},
author = {Johnson, Matthew},
abstractNote = {A heat dissipating assembly including a layered stack of materials with a highly thermally conductive path for cooling a circuit, the stack including a structurally isolated material having a high coefficient of thermal expansion connected between materials having low coefficients of thermal expansion.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2020},
month = {4}
}
Save to My Library
You must Sign In or Create an Account in order to save documents to your library.
Works referenced in this record:
Monolithic microelectronic circuit package including low-temperature-cofired-ceramic (LTCC) tape dielectric structure and in-situ heat sink
patent, January 1995
- Polinski, Sr., Paul W.
- US Patent Document 5,386,339
Multi-Layer Circuit Substrate and Motor Drive Circuit Substrate
patent-application, October 2009
- Nakai, Motoo; Nagase, Shigeki
- US Patent Application 12/492429; 20090260858
Integrated Circuit Mounting for Thermal Stress Relief Useable in a Multi-Chip Module
patent-application, April 2007
- Alhayek, Iyad; Bianco, Gerry
- US Patent Application 11/234937; 20070090522
Insulated Metal Substrate
patent-application, October 2014
- Shashkov, Pavel; Khomutov, Gennady; Yerokhin, Aleksey
- US Patent Application 13/984126; 20140293554
Copper Substrate with Feedthroughs and Interconnection Circuits
patent-application, February 2007
- Salmon, Peter C.
- US Patent Application 11/495009; 20070023889
Surface mountable hermetically sealed package
patent, May 2011
- Zhuang, Weidong
- US Patent Document 7,948,069
Integrated Circuit Chip Packaging
patent-application, August 2017
- Kwark, Young Hoon
- US Patent Application 15/589131; 20170243816
Heat releasing member, package for accommodating semiconductor element and semiconductor device
patent, July 2005
- Basho, Yoshihiro; Mori, Ryuji; Miyauchi, Masahiko
- US Patent Document 6,921,971
Semiconductor device having a heat-sink attached thereto
patent, May 1992
- Katsuraoka, Kiyoshi
- US Patent Document 5,117,281
Ball grid array package with multiple interposers
patent, March 2005
- Zhao, Sam Ziqun; Khan, Reza-ur Rahman
- US Patent Document 6,861,750
Low-Temperature-Cofired-Ceramic Package and Method of Manufacturing the Same
patent-application, April 2010
- Kwank, Changsoo; Noh, Youn-Sub; Uhm, Man-Seok
- US Patent Application 12/529775; 20100103623
Semiconductor package with heat dissipating structure and method of manufacturing the same
patent, April 2007
- Seo, Jeong-Woo
- US Patent Document 7,202,561