DOE Patents title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Heat dissipation assembly

Abstract

A heat dissipating assembly including a layered stack of materials with a highly thermally conductive path for cooling a circuit, the stack including a structurally isolated material having a high coefficient of thermal expansion connected between materials having low coefficients of thermal expansion.

Inventors:
Issue Date:
Research Org.:
Kansas City Plant (KCP), Kansas City, MO (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1650775
Patent Number(s):
10622277
Application Number:
16/006,227
Assignee:
Honeywell Federal Manufacturing & Technologies, LLC (Kansas City, MO)
Patent Classifications (CPCs):
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
DOE Contract Number:  
NA0000622
Resource Type:
Patent
Resource Relation:
Patent File Date: 06/12/2018
Country of Publication:
United States
Language:
English
Subject:
36 MATERIALS SCIENCE; 42 ENGINEERING

Citation Formats

Johnson, Matthew. Heat dissipation assembly. United States: N. p., 2020. Web.
Johnson, Matthew. Heat dissipation assembly. United States.
Johnson, Matthew. Tue . "Heat dissipation assembly". United States. https://www.osti.gov/servlets/purl/1650775.
@article{osti_1650775,
title = {Heat dissipation assembly},
author = {Johnson, Matthew},
abstractNote = {A heat dissipating assembly including a layered stack of materials with a highly thermally conductive path for cooling a circuit, the stack including a structurally isolated material having a high coefficient of thermal expansion connected between materials having low coefficients of thermal expansion.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2020},
month = {4}
}

Works referenced in this record:

Multi-Layer Circuit Substrate and Motor Drive Circuit Substrate
patent-application, October 2009


Integrated Circuit Mounting for Thermal Stress Relief Useable in a Multi-Chip Module
patent-application, April 2007


Insulated Metal Substrate
patent-application, October 2014


Copper Substrate with Feedthroughs and Interconnection Circuits
patent-application, February 2007


Integrated Circuit Chip Packaging
patent-application, August 2017


Ball grid array package with multiple interposers
patent, March 2005


Low-Temperature-Cofired-Ceramic Package and Method of Manufacturing the Same
patent-application, April 2010