Apparatus and method for facilitating planar delayering of integrated circuit die
Abstract
An apparatus and method for facilitating the removal of layers from a die for an integrated circuit while maintaining the planarity of the surface of the die by avoiding rounding the corners and other edges of the die. A pocket is created in a sacrificial material, such that when the die is inserted into the pocket the edges of the die are contiguous with the walls of the pocket and a top surface of the die is coplanar with a top surface of the pocket. The sacrificial material may be the same material as the die. An adhesive substance is placed in the pocket, and the die is inserted into the pocket and against the adhesive substance which aids in retaining the die in the pocket. The layers may then be removed from the die and the sacrificial material around the die without rounding the edges of the die.
- Inventors:
- Issue Date:
- Research Org.:
- Kansas City Plant (KCP), Kansas City, MO (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1632589
- Patent Number(s):
- 10573547
- Application Number:
- 16/180,734
- Assignee:
- Honeywell Federal Manufacturing & Technologies, LLC (Kansas City, MO)
- Patent Classifications (CPCs):
-
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
- DOE Contract Number:
- NA0000622
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 11/05/2018
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING; 36 MATERIALS SCIENCE
Citation Formats
Trujillo, Joshua Joseph, and Williams, Robert Allen. Apparatus and method for facilitating planar delayering of integrated circuit die. United States: N. p., 2020.
Web.
Trujillo, Joshua Joseph, & Williams, Robert Allen. Apparatus and method for facilitating planar delayering of integrated circuit die. United States.
Trujillo, Joshua Joseph, and Williams, Robert Allen. Tue .
"Apparatus and method for facilitating planar delayering of integrated circuit die". United States. https://www.osti.gov/servlets/purl/1632589.
@article{osti_1632589,
title = {Apparatus and method for facilitating planar delayering of integrated circuit die},
author = {Trujillo, Joshua Joseph and Williams, Robert Allen},
abstractNote = {An apparatus and method for facilitating the removal of layers from a die for an integrated circuit while maintaining the planarity of the surface of the die by avoiding rounding the corners and other edges of the die. A pocket is created in a sacrificial material, such that when the die is inserted into the pocket the edges of the die are contiguous with the walls of the pocket and a top surface of the die is coplanar with a top surface of the pocket. The sacrificial material may be the same material as the die. An adhesive substance is placed in the pocket, and the die is inserted into the pocket and against the adhesive substance which aids in retaining the die in the pocket. The layers may then be removed from the die and the sacrificial material around the die without rounding the edges of the die.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2020},
month = {2}
}
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