Setting operating points for circuits in an integrated circuit chip using an integrated voltage regulator power loss model
Abstract
An apparatus includes an integrated circuit chip with a set of circuits having two or more subsets of circuits; an external voltage regulator separate from the integrated circuit chip; two or more integrated voltage regulators on the integrated circuit chip that each provide an input voltage to a respective subset of the circuits; and a controller. The controller determines, using an integrated voltage regulator power loss model, an electrical power loss for the integrated voltage regulators for a first combination of operating points for the subsets of the circuits. The controller then determines, based on the electrical power loss, a second combination of operating points for the subsets of the circuits that includes an adjustment to an operating point for at least one of the subsets of the circuits that compensates for an electrical power loss of the corresponding integrated voltage regulator. The controller sets an operating point of each of the subsets of the circuits based on the second combination of operating points.
- Inventors:
- Issue Date:
- Research Org.:
- Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1632554
- Patent Number(s):
- 10560022
- Application Number:
- 16/440,838
- Assignee:
- Advanced Micro Devices, Inc. (Santa Clara, CA)
- Patent Classifications (CPCs):
-
G - PHYSICS G05 - CONTROLLING G05F - SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- AC52-07NA27344; B620717
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 06/13/2019
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING
Citation Formats
Huang, Wei, Rodriguez, Miguel, and Rao, Karthik. Setting operating points for circuits in an integrated circuit chip using an integrated voltage regulator power loss model. United States: N. p., 2020.
Web.
Huang, Wei, Rodriguez, Miguel, & Rao, Karthik. Setting operating points for circuits in an integrated circuit chip using an integrated voltage regulator power loss model. United States.
Huang, Wei, Rodriguez, Miguel, and Rao, Karthik. Tue .
"Setting operating points for circuits in an integrated circuit chip using an integrated voltage regulator power loss model". United States. https://www.osti.gov/servlets/purl/1632554.
@article{osti_1632554,
title = {Setting operating points for circuits in an integrated circuit chip using an integrated voltage regulator power loss model},
author = {Huang, Wei and Rodriguez, Miguel and Rao, Karthik},
abstractNote = {An apparatus includes an integrated circuit chip with a set of circuits having two or more subsets of circuits; an external voltage regulator separate from the integrated circuit chip; two or more integrated voltage regulators on the integrated circuit chip that each provide an input voltage to a respective subset of the circuits; and a controller. The controller determines, using an integrated voltage regulator power loss model, an electrical power loss for the integrated voltage regulators for a first combination of operating points for the subsets of the circuits. The controller then determines, based on the electrical power loss, a second combination of operating points for the subsets of the circuits that includes an adjustment to an operating point for at least one of the subsets of the circuits that compensates for an electrical power loss of the corresponding integrated voltage regulator. The controller sets an operating point of each of the subsets of the circuits based on the second combination of operating points.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Feb 11 00:00:00 EST 2020},
month = {Tue Feb 11 00:00:00 EST 2020}
}
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patent-application, October 2011
- Yoshioka, Shigeyuki; Sasaki, Kenta; Murakami, Kotaro
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