Title: Input-output processing on a remote integrated circuit chip

Abstract

An electronic device includes a first integrated circuit chip including a processing functional block, and a second integrated circuit chip including an input-output (IO) functional block. The IO functional block performs one or more IO processing operations on behalf of the processing functional block in the first integrated circuit chip. The first integrated circuit chip lacks at least some elements of the IO functional block, so that the processing functional block is unable to perform corresponding IO operations without the IO functional block.

Inventors:

Roberts, David A.; Gonzales, Dean

Issue Date:

2019-12-24

Research Org.:

Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)

Sponsoring Org.:

USDOE

OSTI Identifier:

1600428

Patent Number(s):

10515173

Application Number:

15/859,156

Assignee:

Advanced Micro Devices, Inc. (Santa Clara, CA)

Patent Classifications (CPCs):

G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

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G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

G06F12/1081 - for peripheral access to main memory, e.g. direct memory access [DMA]
G06F30/39 - Circuit design at the physical level
G06F9/3881 - {Arrangements for communication of instructions and data}

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

H01L2224/131 - with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
H01L2224/16227 - the bump connector connecting to a bond pad of the item
H01L2224/32145 - the bodies being stacked
H01L2224/73253 - Bump and layer connectors
H01L2225/06517 - Bump or bump-like direct electrical connections from device to substrate
H01L2225/06541 - Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
H01L2225/06558 - the devices having passive surfaces facing each other, i.e. in a back-to-back arrangement
H01L2225/06565 - the devices having the same size and there being no auxiliary carrier between the devices
H01L23/60 - Protection against electrostatic charges or discharges, e.g. Faraday shields
H01L24/13 - {of an individual bump connector}
H01L24/16 - {of an individual bump connector}
H01L25/0657 - {Stacked arrangements of devices}
H01L25/18 - the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L51/00 {
H01L2924/00014 - the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
H01L2924/014 - Solder alloys
H01L2924/1431 - Logic devices
H01L2924/1434 - Memory

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DOE Contract Number:  

AC52-07NA27344; B620717

Resource Type:

Patent

Resource Relation:

Patent File Date: 12/29/2017

Country of Publication:

United States

Language:

English

Subject:

42 ENGINEERING