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Title: Ionic floating-gate memory device

Abstract

A non-volatile memory device is described herein. The non-volatile memory device includes a diffusive memristor electrically coupled to a redox transistor. The redox transistor includes a gate, a source, and a drain, wherein the gate comprises a first storage element that acts as an ion reservoir, and a channel between the source and the drain comprises a second storage element, wherein a state of the memory device is represented by conductance of the second storage element.

Inventors:
; ;
Issue Date:
Research Org.:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Org.:
USDOE National Nuclear Security Administration (NNSA)
OSTI Identifier:
1600365
Patent Number(s):
10497866
Application Number:
16/012,430
Assignee:
National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)
Patent Classifications (CPCs):
G - PHYSICS G11 - INFORMATION STORAGE G11C - STATIC STORES
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
DOE Contract Number:  
NA0003525
Resource Type:
Patent
Resource Relation:
Patent File Date: 06/19/2018
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING; 42 ENGINEERING

Citation Formats

Fuller, Elliot James, Agarwal, Sapan, and Talin, Albert Alec. Ionic floating-gate memory device. United States: N. p., 2019. Web.
Fuller, Elliot James, Agarwal, Sapan, & Talin, Albert Alec. Ionic floating-gate memory device. United States.
Fuller, Elliot James, Agarwal, Sapan, and Talin, Albert Alec. Tue . "Ionic floating-gate memory device". United States. https://www.osti.gov/servlets/purl/1600365.
@article{osti_1600365,
title = {Ionic floating-gate memory device},
author = {Fuller, Elliot James and Agarwal, Sapan and Talin, Albert Alec},
abstractNote = {A non-volatile memory device is described herein. The non-volatile memory device includes a diffusive memristor electrically coupled to a redox transistor. The redox transistor includes a gate, a source, and a drain, wherein the gate comprises a first storage element that acts as an ion reservoir, and a channel between the source and the drain comprises a second storage element, wherein a state of the memory device is represented by conductance of the second storage element.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2019},
month = {12}
}

Patent:

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