Cache-based communication between execution threads of a data processing system
Abstract
A virtual link buffer provides communication between processing threads or cores. A first cache is accessible by a first processing device and a second cache accessible by a second processing device. An interconnect structure couples between the first and second caches and includes a link controller. A producer cache line in the first cache stores data produced by the first processing device and the link controller transfers data in the producer cache line to a consumer cache line in the second cache. Each new data element is stored at a location in the producer cache line indicated by a store position or tail indicator that is stored at a predetermined location in the same cache line. Transferred data are loaded from a location in the consumer cache line indicated by a load position or head indicator that is stored at a predetermined location in the same consumer cache line.
- Inventors:
- Issue Date:
- Research Org.:
- Arm Ltd., Cambridge (United Kingdom)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1600279
- Patent Number(s):
- 10474575
- Application Number:
- 15/483,036
- Assignee:
- Arm Limited (Cambridge, GB)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 04/10/2017
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Beard, Jonathan Curtis, and Van Hensbergen, Eric V. Cache-based communication between execution threads of a data processing system. United States: N. p., 2019.
Web.
Beard, Jonathan Curtis, & Van Hensbergen, Eric V. Cache-based communication between execution threads of a data processing system. United States.
Beard, Jonathan Curtis, and Van Hensbergen, Eric V. Tue .
"Cache-based communication between execution threads of a data processing system". United States. https://www.osti.gov/servlets/purl/1600279.
@article{osti_1600279,
title = {Cache-based communication between execution threads of a data processing system},
author = {Beard, Jonathan Curtis and Van Hensbergen, Eric V.},
abstractNote = {A virtual link buffer provides communication between processing threads or cores. A first cache is accessible by a first processing device and a second cache accessible by a second processing device. An interconnect structure couples between the first and second caches and includes a link controller. A producer cache line in the first cache stores data produced by the first processing device and the link controller transfers data in the producer cache line to a consumer cache line in the second cache. Each new data element is stored at a location in the producer cache line indicated by a store position or tail indicator that is stored at a predetermined location in the same cache line. Transferred data are loaded from a location in the consumer cache line indicated by a load position or head indicator that is stored at a predetermined location in the same consumer cache line.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Nov 12 00:00:00 EST 2019},
month = {Tue Nov 12 00:00:00 EST 2019}
}
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