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Title: Dynamic virtualized field-programmable gate array resource control for performance and reliability

Abstract

A method for allocating field-programmable gate array (FPGA) resources includes monitoring a first operating metric for one or more computing devices, identifying a first portion of plurality of macro components of a set of one or more FPGA devices in the one or more computing devices, where the first portion is allocated for implementing one or more user defined functions. The method also includes, in response to a first change in the first operating metric, reallocating the first portion of the macro components for implementing a system function associated with the first operating metric, and generating a first notification indicating the reallocation of the first portion.

Inventors:
;
Issue Date:
Research Org.:
Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1600181
Patent Number(s):
10447273
Application Number:
16/128,014
Assignee:
Advanced Micro Devices, Inc. (Santa Clara, CA)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
H - ELECTRICITY H03 - BASIC ELECTRONIC CIRCUITRY H03K - PULSE TECHNIQUE
DOE Contract Number:  
AC52-07NA27344; B620717
Resource Type:
Patent
Resource Relation:
Patent File Date: 09/11/2018
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Roberts, David A., and Cho, Shenghsun. Dynamic virtualized field-programmable gate array resource control for performance and reliability. United States: N. p., 2019. Web.
Roberts, David A., & Cho, Shenghsun. Dynamic virtualized field-programmable gate array resource control for performance and reliability. United States.
Roberts, David A., and Cho, Shenghsun. Tue . "Dynamic virtualized field-programmable gate array resource control for performance and reliability". United States. https://www.osti.gov/servlets/purl/1600181.
@article{osti_1600181,
title = {Dynamic virtualized field-programmable gate array resource control for performance and reliability},
author = {Roberts, David A. and Cho, Shenghsun},
abstractNote = {A method for allocating field-programmable gate array (FPGA) resources includes monitoring a first operating metric for one or more computing devices, identifying a first portion of plurality of macro components of a set of one or more FPGA devices in the one or more computing devices, where the first portion is allocated for implementing one or more user defined functions. The method also includes, in response to a first change in the first operating metric, reallocating the first portion of the macro components for implementing a system function associated with the first operating metric, and generating a first notification indicating the reallocation of the first portion.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2019},
month = {10}
}

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