Method and apparatus for reordering in a non-uniform compute device
Abstract
A data processing apparatus includes a multi-level memory system, one or more first processing unit coupled to the memory system at a first level and one or more second processing units each coupled to the memory system at a second level. A first reorder buffer maintains data order during execution of instructions by the first and second processing units and a second reorder buffer maintains data order during execution of the instructions by an associated second processing unit. An entry in the first reorder buffer is configured, dependent upon an indicator bit, as an entry for a single instruction or a pointer to an entry in the second reorder buffer. An entry in the second reorder buffer includes instruction block start and end addresses and indicators of input and output register. Instructions are released to a processing unit when all inputs, as indicated by the reorder buffers, are available.
- Inventors:
- Issue Date:
- Research Org.:
- ARM Limited, Cambridge (United Kingdom)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1600162
- Patent Number(s):
- 10445094
- Application Number:
- 15/166,467
- Assignee:
- ARM Limited (Cambridge, GB)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE Y02D - CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWN ENERGY USE
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 05/27/2016
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Beard, Jonathan Curtis, Elsasser, Wendy, and Wang, Shibo. Method and apparatus for reordering in a non-uniform compute device. United States: N. p., 2019.
Web.
Beard, Jonathan Curtis, Elsasser, Wendy, & Wang, Shibo. Method and apparatus for reordering in a non-uniform compute device. United States.
Beard, Jonathan Curtis, Elsasser, Wendy, and Wang, Shibo. Tue .
"Method and apparatus for reordering in a non-uniform compute device". United States. https://www.osti.gov/servlets/purl/1600162.
@article{osti_1600162,
title = {Method and apparatus for reordering in a non-uniform compute device},
author = {Beard, Jonathan Curtis and Elsasser, Wendy and Wang, Shibo},
abstractNote = {A data processing apparatus includes a multi-level memory system, one or more first processing unit coupled to the memory system at a first level and one or more second processing units each coupled to the memory system at a second level. A first reorder buffer maintains data order during execution of instructions by the first and second processing units and a second reorder buffer maintains data order during execution of the instructions by an associated second processing unit. An entry in the first reorder buffer is configured, dependent upon an indicator bit, as an entry for a single instruction or a pointer to an entry in the second reorder buffer. An entry in the second reorder buffer includes instruction block start and end addresses and indicators of input and output register. Instructions are released to a processing unit when all inputs, as indicated by the reorder buffers, are available.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2019},
month = {10}
}
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