Title: Diamond based current aperture vertical transistor and methods of making and using the same

Abstract

A semiconductor structure, device, or vertical field effect transistor is comprised of a drain, a drift layer disposed in a first direction relative to the drain and in electronic communication with the drain, a barrier layer disposed in the first direction relative to the drift layer and in electronic communication with the drain, the barrier layer comprising a current blocking layer and an aperture region, a two-dimensional hole gas-containing layer disposed in the first direction relative to the barrier layer, a gate electrode oriented to alter an energy level of the aperture region when a gate voltage is applied to the gate electrode, and a source in ohmic contact with the two-dimensional hole gas-containing layer. At least one of an additional layer, the drain, the drift region, the current blocking layer, the two-dimensional hole gas-containing layer, and the aperture region comprises diamond.

Inventors:

Chowdhury, Srabanti; Dutta, Maitreya; Nemanich, Robert; Koeck, Franz

Issue Date:

2019-09-17

Research Org.:

Arizona State Univ., Scottsdale, AZ (United States); Univ. of California, Oakland, CA (United States)

Sponsoring Org.:

USDOE

OSTI Identifier:

1576317

Patent Number(s):

10418475

Application Number:

15/824,519

Assignee:

Arizona Board of Regents on behalf of Arizona State University (Scottsdale, AZ); The Regents of the University of California (Oakland, CA)

Patent Classifications (CPCs):

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

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H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

H01L21/02115 - {the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon}
H01L21/02236 - {group IV semiconductor}
H01L21/0415 - {using ion implantation}
H01L21/265 - producing ion implantation
H01L29/0603 - {characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
H01L29/0646 - {PN junctions}
H01L29/1037 - {and non-planar channel
H01L29/1066 - {Gate region of field-effect devices with PN junction gate}
H01L29/1602 - {Diamond}
H01L29/365 - {Planar doping, e.g. atomic-plane doping, delta-doping}
H01L29/41741 - {for vertical or pseudo-vertical devices}
H01L29/42356 - {Disposition, e.g. buried gate electrode
H01L29/45 - Ohmic electrodes
H01L29/66045 - {Field-effect transistors}
H01L29/66462 - {with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT}
H01L29/7725 - {with delta-doped channel
H01L29/7781 - {with inverted single heterostructure, i.e. with active layer formed on top of wide bandgap layer, e.g. IHEMT}
H01L29/7787 - {with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET}
H01L29/7788 - {Vertical transistors}
H01L29/7802 - {Vertical DMOS transistors, i.e. VDMOS transistors}
H01L29/7827 - {Vertical transistors
H01L29/8083 - {Vertical transistors

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DOE Contract Number:  

AR0000453

Resource Type:

Patent

Resource Relation:

Patent File Date: 2017 Nov 28

Country of Publication:

United States

Language:

English

Subject:

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY; 42 ENGINEERING; 36 MATERIALS SCIENCE