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Title: Integrated circuit authentication from a die material measurement

Abstract

The various technologies presented herein relate to measuring a signal generated by a die-based test circuit incorporated into an IC, and utilizing the measured signal to authenticate the IC. The signal can be based upon a sensor response generated by the test circuit fabricated into the die, wherein the sensor response is based upon a property of the die material. The signal can be compared with a reference value obtained from one or more test circuit(s) respectively located on one or more reference dies, wherein the reference dies are respectively cut from different wafers, and the location at which the reference dies were cut is known. If the measured signal matches the reference value, the die is deemed to be from the same cut location as the dies from which the reference value was obtained. If the measured signal does not match the reference value, the die is not authenticated.

Inventors:
; ;
Issue Date:
Research Org.:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1576257
Patent Number(s):
10429438
Application Number:
15/221,814
Assignee:
National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)
Patent Classifications (CPCs):
G - PHYSICS G01 - MEASURING G01R - MEASURING ELECTRIC VARIABLES
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
DOE Contract Number:  
AC04-94AL85000
Resource Type:
Patent
Resource Relation:
Patent File Date: 2016 Jul 28
Country of Publication:
United States
Language:
English
Subject:
47 OTHER INSTRUMENTATION

Citation Formats

Zortman, William A., Helinski, Ryan, and Hamlet, Jason. Integrated circuit authentication from a die material measurement. United States: N. p., 2019. Web.
Zortman, William A., Helinski, Ryan, & Hamlet, Jason. Integrated circuit authentication from a die material measurement. United States.
Zortman, William A., Helinski, Ryan, and Hamlet, Jason. Tue . "Integrated circuit authentication from a die material measurement". United States. https://www.osti.gov/servlets/purl/1576257.
@article{osti_1576257,
title = {Integrated circuit authentication from a die material measurement},
author = {Zortman, William A. and Helinski, Ryan and Hamlet, Jason},
abstractNote = {The various technologies presented herein relate to measuring a signal generated by a die-based test circuit incorporated into an IC, and utilizing the measured signal to authenticate the IC. The signal can be based upon a sensor response generated by the test circuit fabricated into the die, wherein the sensor response is based upon a property of the die material. The signal can be compared with a reference value obtained from one or more test circuit(s) respectively located on one or more reference dies, wherein the reference dies are respectively cut from different wafers, and the location at which the reference dies were cut is known. If the measured signal matches the reference value, the die is deemed to be from the same cut location as the dies from which the reference value was obtained. If the measured signal does not match the reference value, the die is not authenticated.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Oct 01 00:00:00 EDT 2019},
month = {Tue Oct 01 00:00:00 EDT 2019}
}

Works referenced in this record:

Method and Apparatus for Authenticating a Semiconductor Die
patent-application, May 2015


Technique for evaluating a fabrication of a die and wafer
patent-application, April 2005


Method, system, and apparatus for authenticating devices during assembly
patent-application, January 2005