Title: Metal oxide semiconductor (MOS) controlled devices and methods of making the same

Abstract

Metal-Oxide-Semiconductor (MOS) controlled semiconductor devices and methods of making the devices are provided. The devices include a gate which controls current flow through channel regions positioned between source/emitter and drain regions of the device. The devices include a gate oxide layer having a variable thickness. The thickness of the gate oxide layer under the edge of the gate and over the source/emitter regions is different than the thickness over the channel regions of the device. The oxide layer thickness near the edge of the gate can be greater than the oxide layer thickness over the channel regions. The source/emitter regions can be implanted to provide enhanced oxide growth during gate oxide formation. The source/emitter region can include regions that are implanted to provide enhanced oxide growth during gate oxide formation and regions which do not provide enhanced oxide growth during gate oxide formation. The devices can be SiC devices such as SiC MOSFETs and SiC IGBTs.

Inventors:

Matocha, Kevin; Chowdhury, Sauvik; Chatty, Kiran; Nowak, John

Issue Date:

2019-07-23

Research Org.:

Monolith Semiconductor Inc., Round Rock, TX (United States)

Sponsoring Org.:

USDOE

OSTI Identifier:

1568637

Patent Number(s):

10361296

Application Number:

15/636,712

Assignee:

Monolith Semiconductor Inc. (Round Rock, TX)

Patent Classifications (CPCs):

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

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H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

H01L29/7395 - {Vertical transistors, e.g. vertical IGBT}
H01L29/42368 - {the thickness being non-uniform}
H01L21/02255 - {formation by thermal treatment
H01L29/0653 - {adjoining the input or output region of a field-effect device, e.g. the source or drain region}
H01L29/0688 - {characterised by the particular shape of a junction between semiconductor regions}
H01L29/0804 - {Emitter regions of bipolar transistors}
H01L21/02236 - {group IV semiconductor}
H01L29/66712 - {Vertical DMOS transistors, i.e. VDMOS transistors}
H01L29/66333 - {Vertical insulated gate bipolar transistors}
H01L29/41766 - {with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor
H01L29/1033 - {with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
H01L21/02164 - {the material being a silicon oxide, e.g. SiO2}
H01L29/1608 - {Silicon carbide}
H01L21/26506 - {in group IV semiconductors}
H01L21/046 - {using ion implantation}
H01L29/66068 - {the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices}
H01L29/0865 - {Disposition}
H01L29/167 - further characterised by the doping material {
H01L29/1095 - {Body region, i.e. base region, of DMOS transistors or IGBTs
H01L29/7802 - {Vertical DMOS transistors, i.e. VDMOS transistors}
H01L29/086 - {Impurity concentration or distribution}
H01L21/049 - {Conductor-insulator-semiconductor electrodes, e.g. MIS contacts}

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DOE Contract Number:  

AR0000442

Resource Type:

Patent

Resource Relation:

Patent File Date: 06/29/2017

Country of Publication:

United States

Language:

English

Subject:

36 MATERIALS SCIENCE; 42 ENGINEERING