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Title: Power MOSFETs with superior high frequency figure-of-merit

Abstract

An insulated-gate field effect transistor includes a substrate having a drift region and a source region of first conductivity type, and a base region and shielding region of second conductivity type therein. The base region forms a first P-N junction with the source region and the shielding region extends between the drift region and the base region. A transition region of first conductivity type is provided, which is electrically coupled to the drift region. The transition region extends between a first surface of the substrate and the shielding region, and forms a second P-N junction with the base region. An insulated gate electrode is provided on a first surface of the substrate. The insulated gate electrode has an electrically conductive gate therein with a drain-side sidewall extending intermediate the second P-N junction and an end of the shielding region when viewed in transverse cross-section.

Inventors:
Issue Date:
Research Org.:
North Carolina State Univ., Raleigh, NC (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1568614
Patent Number(s):
10,355,132
Application Number:
15/925,826
Assignee:
North Carolina State University (Raleigh, NC)
DOE Contract Number:  
EE0006521
Resource Type:
Patent
Resource Relation:
Patent File Date: 03/20/2018
Country of Publication:
United States
Language:
English

Citation Formats

Baliga, Bantval Jayant. Power MOSFETs with superior high frequency figure-of-merit. United States: N. p., 2019. Web.
Baliga, Bantval Jayant. Power MOSFETs with superior high frequency figure-of-merit. United States.
Baliga, Bantval Jayant. Tue . "Power MOSFETs with superior high frequency figure-of-merit". United States. https://www.osti.gov/servlets/purl/1568614.
@article{osti_1568614,
title = {Power MOSFETs with superior high frequency figure-of-merit},
author = {Baliga, Bantval Jayant},
abstractNote = {An insulated-gate field effect transistor includes a substrate having a drift region and a source region of first conductivity type, and a base region and shielding region of second conductivity type therein. The base region forms a first P-N junction with the source region and the shielding region extends between the drift region and the base region. A transition region of first conductivity type is provided, which is electrically coupled to the drift region. The transition region extends between a first surface of the substrate and the shielding region, and forms a second P-N junction with the base region. An insulated gate electrode is provided on a first surface of the substrate. The insulated gate electrode has an electrically conductive gate therein with a drain-side sidewall extending intermediate the second P-N junction and an end of the shielding region when viewed in transverse cross-section.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2019},
month = {7}
}

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Works referenced in this record:

Field-effect semiconductor device having pillar regions of different conductivity type arranged in an active area
patent, April 2018


Charge compensation structure and manufacturing therefor
patent, March 2016


Reverse-conducting semiconductor device
patent, October 2018


Semiconductor device and method of manufacturing the same
patent, April 2011


Semiconductor device having a junction of P type pillar region and N type pillar region
patent, September 2011