# System and method for obfuscation of electronic circuits

## Abstract

A computer-implemented method of generating randomized electrical interconnects for an electronic circuit comprises steps of receiving a netlist of nodes of electronic components to be connected, each connection of nodes forming an electrical interconnect; determining a list of one or more path directions for each electrical interconnect; determining a plurality of path direction distances for each electrical interconnect; generating a plurality of segments for each electrical interconnect, each segment having one path direction and a length which are selected at random; calculating a sum of the lengths of all of the segments in each path direction each time a segment is generated for each electrical interconnect; removing one path direction from the list of path directions when a first condition is met; and stopping the generating a plurality of segments for each electrical interconnect when a second condition is met.

- Inventors:

- Issue Date:

- Research Org.:
- Honeywell Federal Manufacturing & Technologies, LLC, Kansas City, MO (United States)

- Sponsoring Org.:
- USDOE

- OSTI Identifier:
- 1568528

- Patent Number(s):
- 10,331,839

- Application Number:
- 15/680,446

- Assignee:
- Honeywell Federal Manufacturing & Technologies, LLC (Kansas City, MO)

- DOE Contract Number:
- NA0000622

- Resource Type:
- Patent

- Resource Relation:
- Patent File Date: 08/18/2017

- Country of Publication:
- United States

- Language:
- English

### Citation Formats

```
Trujillo, Joshua.
```*System and method for obfuscation of electronic circuits*. United States: N. p., 2019.
Web.

```
Trujillo, Joshua.
```*System and method for obfuscation of electronic circuits*. United States.

```
Trujillo, Joshua. Tue .
"System and method for obfuscation of electronic circuits". United States. https://www.osti.gov/servlets/purl/1568528.
```

```
@article{osti_1568528,
```

title = {System and method for obfuscation of electronic circuits},

author = {Trujillo, Joshua},

abstractNote = {A computer-implemented method of generating randomized electrical interconnects for an electronic circuit comprises steps of receiving a netlist of nodes of electronic components to be connected, each connection of nodes forming an electrical interconnect; determining a list of one or more path directions for each electrical interconnect; determining a plurality of path direction distances for each electrical interconnect; generating a plurality of segments for each electrical interconnect, each segment having one path direction and a length which are selected at random; calculating a sum of the lengths of all of the segments in each path direction each time a segment is generated for each electrical interconnect; removing one path direction from the list of path directions when a first condition is met; and stopping the generating a plurality of segments for each electrical interconnect when a second condition is met.},

doi = {},

journal = {},

number = ,

volume = ,

place = {United States},

year = {2019},

month = {6}

}