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Title: High voltage semiconductor devices and methods of making the devices

Abstract

A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.

Inventors:
; ;
Issue Date:
Research Org.:
Monolith Semiconductor Inc., Round Rock, TX (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1568341
Patent Number(s):
10,290,732
Application Number:
15/844,766
Assignee:
Monolith Semiconductor Inc. (Round Rock, TX)
DOE Contract Number:  
AR0000442
Resource Type:
Patent
Resource Relation:
Patent File Date: 12/18/2017
Country of Publication:
United States
Language:
English
Subject:
36 MATERIALS SCIENCE; 42 ENGINEERING

Citation Formats

Matocha, Kevin, Chatty, Kiran, and Banerjee, Sujit. High voltage semiconductor devices and methods of making the devices. United States: N. p., 2019. Web.
Matocha, Kevin, Chatty, Kiran, & Banerjee, Sujit. High voltage semiconductor devices and methods of making the devices. United States.
Matocha, Kevin, Chatty, Kiran, and Banerjee, Sujit. Tue . "High voltage semiconductor devices and methods of making the devices". United States. https://www.osti.gov/servlets/purl/1568341.
@article{osti_1568341,
title = {High voltage semiconductor devices and methods of making the devices},
author = {Matocha, Kevin and Chatty, Kiran and Banerjee, Sujit},
abstractNote = {A multi-cell MOSFET device including a MOSFET cell with an integrated Schottky diode is provided. The MOSFET includes n-type source regions formed in p-type well regions which are formed in an n-type drift layer. A p-type body contact region is formed on the periphery of the MOSFET. The source metallization of the device forms a Schottky contact with an n-type semiconductor region adjacent the p-type body contact region of the device. Vias can be formed through a dielectric material covering the source ohmic contacts and/or Schottky region of the device and the source metallization can be formed in the vias. The n-type semiconductor region forming the Schottky contact and/or the n-type source regions can be a single continuous region or a plurality of discontinuous regions alternating with discontinuous p-type body contact regions. The device can be a SiC device. Methods of making the device are also provided.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2019},
month = {5}
}

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Works referenced in this record:

Power DMOS transistor with high speed body diode
patent, March 1989


Power transistor structure with high speed integral antiparallel Schottky diode
patent, October 1990


High voltage semiconductor devices and methods of making the devices
patent, February 2017


Trench DMOS transistor with embedded trench schottky rectifier
patent, September 2003


Multicellular FET having a Schottky diode merged therewith
patent, May 1992


Low Loss Sic Mosfet
patent-application, October 2013


Semiconductor element
patent, October 2006


Schottky diode
patent, March 2014


High voltage semiconductor devices and methods of making the devices
patent, January 2018