System and method for performing SRAM write assist
Abstract
A method and a system are provided for performing write assist. Write assist circuitry is initialized and voltage collapse is initiated to reduce a column supply voltage provided to a storage cell. A bitline of the storage cell is boosted to a boosted voltage level that is below a low supply voltage provided to the storage cell and data encoded by the bitline is written to the storage cell.
- Inventors:
- Issue Date:
- Research Org.:
- NVIDIA Corp., Santa Clara, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1532132
- Patent Number(s):
- 8,861,290
- Application Number:
- 13/710,314
- Assignee:
- NVIDIA Corporation (Santa Clara, CA)
- DOE Contract Number:
- B599861
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2012-12-10
- Country of Publication:
- United States
- Language:
- English
Citation Formats
Zimmer, Brian Matthew, and Sinangil, Mahmut Ersin. System and method for performing SRAM write assist. United States: N. p., 2014.
Web.
Zimmer, Brian Matthew, & Sinangil, Mahmut Ersin. System and method for performing SRAM write assist. United States.
Zimmer, Brian Matthew, and Sinangil, Mahmut Ersin. Tue .
"System and method for performing SRAM write assist". United States. https://www.osti.gov/servlets/purl/1532132.
@article{osti_1532132,
title = {System and method for performing SRAM write assist},
author = {Zimmer, Brian Matthew and Sinangil, Mahmut Ersin},
abstractNote = {A method and a system are provided for performing write assist. Write assist circuitry is initialized and voltage collapse is initiated to reduce a column supply voltage provided to a storage cell. A bitline of the storage cell is boosted to a boosted voltage level that is below a low supply voltage provided to the storage cell and data encoded by the bitline is written to the storage cell.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2014},
month = {10}
}
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