On-package multiprocessor ground-referenced single-ended interconnect

Dally, William J.; Khailany, Brucek Kurdo; Poulton, John W.; Greer, Thomas Hastings; Gray, Carl Thomas

Title: On-package multiprocessor ground-referenced single-ended interconnect

Abstract

A system of interconnected chips comprising a multi-chip module (MCM) includes a first processor chip, a second processor chip, and an MCM package configured to include the first processor chip, the second processor chip, and an interconnect circuit. The first processor chip is configured to include a first ground-referenced single-ended signaling (GRS) interface circuit. A first set of electrical traces fabricated within the MCM package and configured to couple the first GRS interface circuit to the interconnect circuit. The second processor chip is configured to include a second GRS interface circuit. A second set of electrical traces fabricated within the MCM package and configured to coupled the second GRS interface circuit to the interconnect circuit.

Inventors:: Dally, William J.; Khailany, Brucek Kurdo; Poulton, John W.; Greer, III, Thomas Hastings; Gray, Carl Thomas

Issue Date:: 2014-10-07

Research Org.:: NVIDIA Corp., Santa Clara, CA (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1532127

Patent Number(s):: 8854123

Application Number:: 13/946,980

Assignee:: NVIDIA Corporation (Santa Clara, CA)

Patent Classifications (CPCs):: H - ELECTRICITY H04 - ELECTRIC COMMUNICATION TECHNIQUE H04L - TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION

H - ELECTRICITY H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR H05K - PRINTED CIRCUITS

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H - ELECTRICITY H04 - ELECTRIC COMMUNICATION TECHNIQUE H04L - TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
H04L25/0292 - {Arrangements specific to the receiver end}
H04L25/028 - {Arrangements specific to the transmitter end}

H - ELECTRICITY H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR H05K - PRINTED CIRCUITS
H05K1/11 - Printed elements for providing electric connections to or between printed circuits

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DOE Contract Number:: B599861

Resource Type:: Patent

Resource Relation:: Patent File Date: 2013-07-19

Country of Publication:: United States

Language:: English

Citation Formats


                    Dally, William J., Khailany, Brucek Kurdo, Poulton, John W., Greer, III, Thomas Hastings, and Gray, Carl Thomas. On-package multiprocessor ground-referenced single-ended interconnect.  United States: N. p., 2014. 
        Web.

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                    Dally, William J., Khailany, Brucek Kurdo, Poulton, John W., Greer, III, Thomas Hastings, & Gray, Carl Thomas. On-package multiprocessor ground-referenced single-ended interconnect.  United States.

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                    Dally, William J., Khailany, Brucek Kurdo, Poulton, John W., Greer, III, Thomas Hastings, and Gray, Carl Thomas. Tue .  
        "On-package multiprocessor ground-referenced single-ended interconnect".  United States.  https://www.osti.gov/servlets/purl/1532127.

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@article{osti_1532127,

  title        = {On-package multiprocessor ground-referenced single-ended interconnect},

  author       = {Dally, William J. and Khailany, Brucek Kurdo and Poulton, John W. and Greer, III, Thomas Hastings and Gray, Carl Thomas},

  abstractNote = {A system of interconnected chips comprising a multi-chip module (MCM) includes a first processor chip, a second processor chip, and an MCM package configured to include the first processor chip, the second processor chip, and an interconnect circuit. The first processor chip is configured to include a first ground-referenced single-ended signaling (GRS) interface circuit. A first set of electrical traces fabricated within the MCM package and configured to couple the first GRS interface circuit to the interconnect circuit. The second processor chip is configured to include a second GRS interface circuit. A second set of electrical traces fabricated within the MCM package and configured to coupled the second GRS interface circuit to the interconnect circuit.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2014},

  month        = {10}

}

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Works referenced in this record:

Semiconductor integrated circuit and system of controlling the same
patent, March 2013

Hatori, Fumitoshi
US Patent Document 8,395,410
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Power control for information handling system having shared resources
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Works referencing / citing this record:

Ground referenced single-ended signaling
patent, June 2015

Poulton, John W.; Greer, III, Thomas; Dally, William J.
US Patent Document 9,071,244
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9071244

Ground-referenced single-ended memory interconnect
patent, September 2015

Dally, William J.; Khailany, Brucek Kurdo; Greer, III, Thomas
US Patent Document 9,147,447
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9147447

Ground-referenced single-ended system-on-package
patent, October 2015

Dally, William J.; Poulton, John W.; Greer, III, Thomas
US Patent Document 9,171,607
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9171607

Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
patent, October 2015

Dally, William J.; Alben, Jonah M.; Poulton, John W.
US Patent Document 9,153,539
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9153539

Multi-phase ground-referenced single-ended signaling
patent, July 2015

Dally, William J.; Poulton, John W.; Greer, III, Thomas
US Patent Document 9,076,551
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9076551

Data-driven charge-pump transmitter for differential signaling
patent, May 2016

Poulton, John W.; Greer, III, Thomas; Dally, William J.
US Patent Document 9,338,036
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9338036

Ground-referenced single-ended memory interconnect
patent, October 2015

Dally, William J.
US Patent Document 9,153,314
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9153314

Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
patent, October 2015

Dally, William J.; Alben, Jonah M.; Poulton, John W.
US Patent Document 9,170,980
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9170980

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