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Title: On-package multiprocessor ground-referenced single-ended interconnect

Abstract

A system of interconnected chips comprising a multi-chip module (MCM) includes a first processor chip, a second processor chip, and an MCM package configured to include the first processor chip, the second processor chip, and an interconnect circuit. The first processor chip is configured to include a first ground-referenced single-ended signaling (GRS) interface circuit. A first set of electrical traces fabricated within the MCM package and configured to couple the first GRS interface circuit to the interconnect circuit. The second processor chip is configured to include a second GRS interface circuit. A second set of electrical traces fabricated within the MCM package and configured to coupled the second GRS interface circuit to the interconnect circuit.

Inventors:
; ; ; ;
Issue Date:
Research Org.:
NVIDIA Corp., Santa Clara, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1532127
Patent Number(s):
8,854,123
Application Number:
13/946,980
Assignee:
NVIDIA Corporation (Santa Clara, CA)
DOE Contract Number:  
B599861
Resource Type:
Patent
Resource Relation:
Patent File Date: 2013-07-19
Country of Publication:
United States
Language:
English

Citation Formats

Dally, William J., Khailany, Brucek Kurdo, Poulton, John W., Greer, III, Thomas Hastings, and Gray, Carl Thomas. On-package multiprocessor ground-referenced single-ended interconnect. United States: N. p., 2014. Web.
Dally, William J., Khailany, Brucek Kurdo, Poulton, John W., Greer, III, Thomas Hastings, & Gray, Carl Thomas. On-package multiprocessor ground-referenced single-ended interconnect. United States.
Dally, William J., Khailany, Brucek Kurdo, Poulton, John W., Greer, III, Thomas Hastings, and Gray, Carl Thomas. Tue . "On-package multiprocessor ground-referenced single-ended interconnect". United States. https://www.osti.gov/servlets/purl/1532127.
@article{osti_1532127,
title = {On-package multiprocessor ground-referenced single-ended interconnect},
author = {Dally, William J. and Khailany, Brucek Kurdo and Poulton, John W. and Greer, III, Thomas Hastings and Gray, Carl Thomas},
abstractNote = {A system of interconnected chips comprising a multi-chip module (MCM) includes a first processor chip, a second processor chip, and an MCM package configured to include the first processor chip, the second processor chip, and an interconnect circuit. The first processor chip is configured to include a first ground-referenced single-ended signaling (GRS) interface circuit. A first set of electrical traces fabricated within the MCM package and configured to couple the first GRS interface circuit to the interconnect circuit. The second processor chip is configured to include a second GRS interface circuit. A second set of electrical traces fabricated within the MCM package and configured to coupled the second GRS interface circuit to the interconnect circuit.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2014},
month = {10}
}

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Works referenced in this record:

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