On-package multiprocessor ground-referenced single-ended interconnect

Title: On-package multiprocessor ground-referenced single-ended interconnect

Abstract

A system of interconnected chips comprising a multi-chip module (MCM) includes a first processor chip, a second processor chip, and an MCM package configured to include the first processor chip, the second processor chip, and an interconnect circuit. The first processor chip is configured to include a first ground-referenced single-ended signaling (GRS) interface circuit. A first set of electrical traces fabricated within the MCM package and configured to couple the first GRS interface circuit to the interconnect circuit. The second processor chip is configured to include a second GRS interface circuit. A second set of electrical traces fabricated within the MCM package and configured to coupled the second GRS interface circuit to the interconnect circuit.

Inventors:: Dally, William J.; Khailany, Brucek Kurdo; Poulton, John W.; Greer, III, Thomas Hastings; Gray, Carl Thomas

Issue Date:: 2014-10-07

Research Org.:: NVIDIA Corp., Santa Clara, CA (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1532127

Patent Number(s):: 8,854,123

Application Number:: 13/946,980

Assignee:: NVIDIA Corporation (Santa Clara, CA)

DOE Contract Number:: B599861

Resource Type:: Patent

Resource Relation:: Patent File Date: 2013-07-19

Country of Publication:: United States

Language:: English

Citation Formats


                    Dally, William J., Khailany, Brucek Kurdo, Poulton, John W., Greer, III, Thomas Hastings, and Gray, Carl Thomas. On-package multiprocessor ground-referenced single-ended interconnect.  United States: N. p., 2014. 
        Web.

Copy to clipboard


                    Dally, William J., Khailany, Brucek Kurdo, Poulton, John W., Greer, III, Thomas Hastings, & Gray, Carl Thomas. On-package multiprocessor ground-referenced single-ended interconnect.  United States.

Copy to clipboard


                    Dally, William J., Khailany, Brucek Kurdo, Poulton, John W., Greer, III, Thomas Hastings, and Gray, Carl Thomas. Tue .  
        "On-package multiprocessor ground-referenced single-ended interconnect".  United States.  https://www.osti.gov/servlets/purl/1532127.

Copy to clipboard


                    
@article{osti_1532127,

  title        = {On-package multiprocessor ground-referenced single-ended interconnect},

  author       = {Dally, William J. and Khailany, Brucek Kurdo and Poulton, John W. and Greer, III, Thomas Hastings and Gray, Carl Thomas},

  abstractNote = {A system of interconnected chips comprising a multi-chip module (MCM) includes a first processor chip, a second processor chip, and an MCM package configured to include the first processor chip, the second processor chip, and an interconnect circuit. The first processor chip is configured to include a first ground-referenced single-ended signaling (GRS) interface circuit. A first set of electrical traces fabricated within the MCM package and configured to couple the first GRS interface circuit to the interconnect circuit. The second processor chip is configured to include a second GRS interface circuit. A second set of electrical traces fabricated within the MCM package and configured to coupled the second GRS interface circuit to the interconnect circuit.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2014},

  month        = {10}

}

Copy to clipboard

Patent:

View Patent

Save / Share:

Export Metadata

Save to My Library

Works referenced in this record:

Semiconductor integrated circuit and system of controlling the same
patent, March 2013

Hatori, Fumitoshi
US Patent Document 8,395,410
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=8395410

Power control for information handling system having shared resources
patent, November 2013

Sultenfuss, Andrew
US Patent Document 8,583,953
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=8583953

Uniform multi-chip identification and routing system
patent, December 2013

Loh, Gabriel H.; Beckmann, Bradford M.; Chung, Jaewoong
US Patent Document 8,621,131
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=8621131

Works referencing / citing this record:

Ground referenced single-ended signaling
patent, June 2015

Poulton, John W.; Greer, III, Thomas; Dally, William J.
US Patent Document 9,071,244
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9071244

Ground-referenced single-ended memory interconnect
patent, September 2015

Dally, William J.; Khailany, Brucek Kurdo; Greer, III, Thomas
US Patent Document 9,147,447
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9147447

Ground-referenced single-ended system-on-package
patent, October 2015

Dally, William J.; Poulton, John W.; Greer, III, Thomas
US Patent Document 9,171,607
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9171607

Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
patent, October 2015

Dally, William J.; Alben, Jonah M.; Poulton, John W.
US Patent Document 9,153,539
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9153539

Multi-phase ground-referenced single-ended signaling
patent, July 2015

Dally, William J.; Poulton, John W.; Greer, III, Thomas
US Patent Document 9,076,551
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9076551

Data-driven charge-pump transmitter for differential signaling
patent, May 2016

Poulton, John W.; Greer, III, Thomas; Dally, William J.
US Patent Document 9,338,036
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9338036

Ground-referenced single-ended memory interconnect
patent, October 2015

Dally, William J.
US Patent Document 9,153,314
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9153314

Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
patent, October 2015

Dally, William J.; Alben, Jonah M.; Poulton, John W.
US Patent Document 9,170,980
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9170980

Similar records in DOE Patents and OSTI.GOV collections:

Multi-phase ground-referenced single-ended signaling

Patent Dally, William J.; Poulton, John W.; Greer, III, Thomas Hastings

A system includes a control circuit and first, second, and third ground-referenced single-ended signaling (GRS) driver circuits that are each coupled to an output signal. The control circuit is configured to generate a first, second, and third set of control signals that are each based on a respective phase of a clock signal. Each GRS driver circuit is configured to pre-charge a capacitor to store a charge based on the respective set of control signals during at least one phase of the clock signal and drive the output signal relative to a ground network by discharging the charge during amore » respective phase of the clock signal.« less
Full Text Available
Solid oxide fuel cell with single material for electrodes and interconnect

Patent McPheeters, Charles C. (Naperville, IL); Nelson, Paul A. (Wheaton, IL); Dees, Dennis W. (Downers Grove, IL)

A solid oxide fuel cell having a plurality of individual cells. A solid oxide fuel cell has an anode and a cathode with electrolyte disposed therebetween, and the anode, cathode and interconnect elements are comprised of substantially one material.
Full Text Available
Method and apparatus for single-stepping coherence events in a multiprocessor system under software control

Patent Blumrich, Matthias A. (Ridgefield, CT); Salapura, Valentina (Chappaqua, NY)

An apparatus and method are disclosed for single-stepping coherence events in a multiprocessor system under software control in order to monitor the behavior of a memory coherence mechanism. Single-stepping coherence events in a multiprocessor system is made possible by adding one or more step registers. By accessing these step registers, one or more coherence requests are processed by the multiprocessor system. The step registers determine if the snoop unit will operate by proceeding in a normal execution mode, or operate in a single-step mode.
Full Text Available
Single level microelectronic device package with an integral window

Patent Peterson, Kenneth A.; Watson, Robert D.

A package with an integral window for housing a microelectronic device. The integral window is bonded directly to the package without having a separate layer of adhesive material disposed in-between the window and the package. The device can be a semiconductor chip, CCD chip, CMOS chip, VCSEL chip, laser diode, MEMS device, or IMEMS device. The package can be formed of a multilayered LTCC or HTCC cofired ceramic material, with the integral window being simultaneously joined to the package during cofiring. The microelectronic device can be flip-chip interconnected so that the light-sensitive side is optically accessible through the window. Amore »« less
Full Text Available
Joint synthetic aperture radar plus ground moving target indicator from single-channel radar using compressive sensing

Patent Thompson, Douglas; Hallquist, Aaron; Anderson, Hyrum

The various embodiments presented herein relate to utilizing an operational single-channel radar to collect and process synthetic aperture radar (SAR) and ground moving target indicator (GMTI) imagery from a same set of radar returns. In an embodiment, data is collected by randomly staggering a slow-time pulse repetition interval (PRI) over a SAR aperture such that a number of transmitted pulses in the SAR aperture is preserved with respect to standard SAR, but many of the pulses are spaced very closely enabling movers (e.g., targets) to be resolved, wherein a relative velocity of the movers places them outside of the SARmore »« less
Full Text Available

Similar Records

Title: On-package multiprocessor ground-referenced single-ended interconnect

Abstract

Citation Formats

Semiconductor integrated circuit and system of controlling the same patent, March 2013

Power control for information handling system having shared resources patent, November 2013

Uniform multi-chip identification and routing system patent, December 2013

Ground referenced single-ended signaling patent, June 2015

Ground-referenced single-ended memory interconnect patent, September 2015

Ground-referenced single-ended system-on-package patent, October 2015

Ground-referenced single-ended signaling connected graphics processing unit multi-chip module patent, October 2015

Multi-phase ground-referenced single-ended signaling patent, July 2015

Data-driven charge-pump transmitter for differential signaling patent, May 2016

Ground-referenced single-ended memory interconnect patent, October 2015

Ground-referenced single-ended signaling connected graphics processing unit multi-chip module patent, October 2015

Semiconductor integrated circuit and system of controlling the same
patent, March 2013

Power control for information handling system having shared resources
patent, November 2013

Uniform multi-chip identification and routing system
patent, December 2013

Ground referenced single-ended signaling
patent, June 2015

Ground-referenced single-ended memory interconnect
patent, September 2015

Ground-referenced single-ended system-on-package
patent, October 2015

Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
patent, October 2015

Multi-phase ground-referenced single-ended signaling
patent, July 2015

Data-driven charge-pump transmitter for differential signaling
patent, May 2016

Ground-referenced single-ended memory interconnect
patent, October 2015

Ground-referenced single-ended signaling connected graphics processing unit multi-chip module
patent, October 2015