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Title: Using redundant transactions to verify the correctness of program code execution

Abstract

In the described embodiments, a processor core (e.g., a GPU core) receives a section of program code to be executed in a transaction from another entity in a computing device. The processor core sends the section of program code to one or more compute units in the processor core to be executed in a first transaction and concurrently executed in a second transaction, thereby creating a “redundant transaction pair.” When the first transaction and the second transaction are completed, the processor core compares a read-set of the first transaction to a read-set of the second transaction and compares a write-set of the first transaction to a write-set of the second transaction. When the read-sets and the write-sets match and no transactional error condition has occurred, the processor core allows results from the first transaction to be committed to an architectural state of the computing device.

Inventors:
;
Issue Date:
Research Org.:
Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1531945
Patent Number(s):
9448933
Application Number:
14/013,252
Assignee:
Advanced Micro Devices, Inc. (Sunnyvale, CA)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
AC52-07NA27344; B600716
Resource Type:
Patent
Resource Relation:
Patent File Date: 2013-08-29
Country of Publication:
United States
Language:
English

Citation Formats

Gurumurthi, Sudhanva, and Sridharan, Vilas K. Using redundant transactions to verify the correctness of program code execution. United States: N. p., 2016. Web.
Gurumurthi, Sudhanva, & Sridharan, Vilas K. Using redundant transactions to verify the correctness of program code execution. United States.
Gurumurthi, Sudhanva, and Sridharan, Vilas K. Tue . "Using redundant transactions to verify the correctness of program code execution". United States. https://www.osti.gov/servlets/purl/1531945.
@article{osti_1531945,
title = {Using redundant transactions to verify the correctness of program code execution},
author = {Gurumurthi, Sudhanva and Sridharan, Vilas K.},
abstractNote = {In the described embodiments, a processor core (e.g., a GPU core) receives a section of program code to be executed in a transaction from another entity in a computing device. The processor core sends the section of program code to one or more compute units in the processor core to be executed in a first transaction and concurrently executed in a second transaction, thereby creating a “redundant transaction pair.” When the first transaction and the second transaction are completed, the processor core compares a read-set of the first transaction to a read-set of the second transaction and compares a write-set of the first transaction to a write-set of the second transaction. When the read-sets and the write-sets match and no transactional error condition has occurred, the processor core allows results from the first transaction to be committed to an architectural state of the computing device.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2016},
month = {9}
}

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