Software only intra-compute unit redundant multithreading for GPUs

Lyashevsky, Alexander; Gurumurthi, Sudhanva; Sridharan, Vilas

Advanced Search OptionsAdvanced Search queries use a traditional Term Search. For more info, see our FAQ.

All Fields:

Patent Title:

Abstract:

Assignee:

Inventor(s):

Patent Number:

Patent Classification (CPC):

All Classifications
A - human necessities
A01 - agriculture
A21 - baking
A22 - butchering
A23 - foods or foodstuffs
A24 - tobacco
A41 - wearing apparel
A42 - headwear
A43 - footwear
A44 - haberdashery
A45 - hand or travelling articles
A46 - brushware
A47 - furniture
A61 - medical or veterinary science
A62 - life-saving
A63 - sports
A99 - subject matter not otherwise provided for in this section
B - performing operations
B01 - physical or chemical processes or apparatus in general
B02 - crushing, pulverising, or disintegrating
B03 - separation of solid materials using liquids or using pneumatic tables or jigs
B04 - centrifugal apparatus or machines for carrying-out physical or chemical processes
B05 - spraying or atomising in general
B06 - generating or transmitting mechanical vibrations in general
B07 - separating solids from solids
B08 - cleaning
B09 - disposal of solid waste
B21 - mechanical metal-working without essentially removing material
B22 - casting
B23 - machine tools
B24 - grinding
B25 - hand tools
B26 - hand cutting tools
B27 - working or preserving wood or similar material
B28 - working cement, clay, or stone
B29 - working of plastics
B30 - presses
B31 - making articles of paper, cardboard or material worked in a manner analogous to paper
B32 - layered products
B33 - additive manufacturing technology
B41 - printing
B42 - bookbinding
B43 - writing or drawing implements
B44 - decorative arts
B60 - vehicles in general
B61 - railways
B62 - land vehicles for travelling otherwise than on rails
B63 - ships or other waterborne vessels
B64 - aircraft
B65 - conveying
B66 - hoisting
B67 - opening, closing {or cleaning} bottles, jars or similar containers
B68 - saddlery
B81 - microstructural technology
B82 - nanotechnology
B99 - subject matter not otherwise provided for in this section
C - chemistry
C01 - inorganic chemistry
C02 - treatment of water, waste water, sewage, or sludge
C03 - glass
C04 - cements
C05 - fertilisers
C06 - explosives
C07 - organic chemistry
C08 - organic macromolecular compounds
C09 - dyes
C10 - petroleum, gas or coke industries
C11 - animal or vegetable oils, fats, fatty substances or waxes
C12 - biochemistry
C13 - sugar industry
C14 - skins
C21 - metallurgy of iron
C22 - metallurgy
C23 - coating metallic material
C25 - electrolytic or electrophoretic processes
C30 - crystal growth
C40 - combinatorial technology
C99 - subject matter not otherwise provided for in this section
D - textiles
D01 - natural or man-made threads or fibres
D02 - yarns
D03 - weaving
D04 - braiding
D05 - sewing
D06 - treatment of textiles or the like
D07 - ropes
D10 - indexing scheme associated with sublasses of section d, relating to textiles
D21 - paper-making
D99 - subject matter not otherwise provided for in this section
E - fixed constructions
E01 - construction of roads, railways, or bridges
E02 - hydraulic engineering
E03 - water supply
E04 - building
E05 - locks
E06 - doors, windows, shutters, or roller blinds in general
E21 - earth drilling
E99 - subject matter not otherwise provided for in this section
F - mechanical engineering
F01 - machines or engines in general
F02 - combustion engines
F03 - machines or engines for liquids
F04 - positive - displacement machines for liquids
F05 - indexing schemes relating to engines or pumps in various subclasses of classes f01-f04
F15 - fluid-pressure actuators
F16 - engineering elements and units
F17 - storing or distributing gases or liquids
F21 - lighting
F22 - steam generation
F23 - combustion apparatus
F24 - heating
F25 - refrigeration or cooling
F26 - drying
F27 - furnaces
F28 - heat exchange in general
F41 - weapons
F42 - ammunition
F99 - subject matter not otherwise provided for in this section
G - physics
G01 - measuring
G02 - optics
G03 - photography
G04 - horology
G05 - controlling
G06 - computing
G07 - checking-devices
G08 - signalling
G09 - education
G10 - musical instruments
G11 - information storage
G12 - instrument details
G16 - information and communication technology [ict] specially adapted for specific application fields
G21 - nuclear physics
G99 - subject matter not otherwise provided for in this section
H - electricity
H01 - basic electric elements
H02 - generation
H03 - basic electronic circuitry
H04 - electric communication technique
H05 - electric techniques not otherwise provided for
H99 - subject matter not otherwise provided for in this section
Y - new / cross sectional technologies
Y02 - technologies or applications for mitigation or adaptation against climate change
Y04 - information or communication technologies having an impact on other technology areas
Y10 - technical subjects covered by former uspc

More Options ...

Title: Software only intra-compute unit redundant multithreading for GPUs

Abstract

A system, method and computer program product to execute a first and a second work-item, and compare the signature variable of the first work-item to the signature variable of the second work-item. The first and the second work-items are mapped to an identifier via software. This mapping ensures that the first and second work-items execute exactly the same data for exactly the same code without changes to the underlying hardware. By executing the first and second work-items independently, the underlying computation of the first and second work-item can be verified. Moreover, system performance is not substantially affected because the execution results of the first and second work-items are compared only at specified comparison points.

Inventors:: Lyashevsky, Alexander; Gurumurthi, Sudhanva; Sridharan, Vilas

Issue Date:: 2016-06-14

Research Org.:: Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1531913

Patent Number(s):: 9367372

Application Number:: 13/920,574

Assignee:: Advanced Micro Devices, Inc. (Sunnyvale, CA)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

Show more

G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F11/00 - Error detection
G06F11/1608 - {Error detection by comparing the output signals of redundant hardware
G06F11/1633 - {using mutual exchange of the output between the redundant processing components}
G06F11/1637 - {using additional compare functionality in one or some but not all of the redundant processing components}
G06F11/1654 - {where the output of only one of the redundant processing components can drive the attached hardware, e.g. memory or I/O}
G06F11/1687 - {at event level, e.g. by interrupt or result of polling}
G06F11/202 - {where processing functionality is redundant
G06F11/2038 - {with a single idle spare processing component}
G06F11/2041 - {with more than one idle spare processing component}
G06F11/2048 - {where the redundant components share neither address space nor persistent storage}
G06F2201/825 - the problem or solution involving locking
G06F2201/83 - the solution involving signatures
G06F9/3851 - {from multiple instruction streams, e.g. multistreaming
G06F9/52 - Program synchronisation

Show less

DOE Contract Number:: AC52-07NA27344; B600716

Resource Type:: Patent

Resource Relation:: Patent File Date: 2013-06-18

Country of Publication:: United States

Language:: English

Citation Formats


                    Lyashevsky, Alexander, Gurumurthi, Sudhanva, and Sridharan, Vilas. Software only intra-compute unit redundant multithreading for GPUs.  United States: N. p., 2016. 
        Web.

Copy to clipboard


                    Lyashevsky, Alexander, Gurumurthi, Sudhanva, & Sridharan, Vilas. Software only intra-compute unit redundant multithreading for GPUs.  United States.

Copy to clipboard


                    Lyashevsky, Alexander, Gurumurthi, Sudhanva, and Sridharan, Vilas. Tue .  
        "Software only intra-compute unit redundant multithreading for GPUs".  United States.  https://www.osti.gov/servlets/purl/1531913.

Copy to clipboard


                    
@article{osti_1531913,

  title        = {Software only intra-compute unit redundant multithreading for GPUs},

  author       = {Lyashevsky, Alexander and Gurumurthi, Sudhanva and Sridharan, Vilas},

  abstractNote = {A system, method and computer program product to execute a first and a second work-item, and compare the signature variable of the first work-item to the signature variable of the second work-item. The first and the second work-items are mapped to an identifier via software. This mapping ensures that the first and second work-items execute exactly the same data for exactly the same code without changes to the underlying hardware. By executing the first and second work-items independently, the underlying computation of the first and second work-item can be verified. Moreover, system performance is not substantially affected because the execution results of the first and second work-items are compared only at specified comparison points.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2016},

  month        = {6}

}

Copy to clipboard

Patent:

Save / Share:

Export Metadata

Save to My Library

Works referenced in this record:

Parallel data processing apparatus
patent-application, November 2002

Stuttard, Dave; Williamsd, Dave; O'Dea, Eamon
US Patent Application 09/972797; 20020174318
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020174318

Method for transmitting data
patent-application, July 2006

Harter, Werner; Zarga, Heikel; Boehl, Eberhard
US Patent Application 10/534603; 20060156127
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060156127

Control of multiple computer processes using a mutual exclusion primitive ordering mechanism
patent, December 2002

Williams, Emrys J.
US Patent Document 6,499,048
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/6499048

Method and apparatus for computer system reliability
patent-application, August 2002

Hofstee, Harm Peter; Nair, Ravi
US Patent Application 09/791143; 20020116662
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20020116662

Error handling system in a redundant processor
patent-application, November 2005

Jardine, Robert L.; Klecka, James S.; Bruckert, William F.
US Patent Application 11/045401; 20050246581
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050246581

method for operating an arithmetic unit
patent-application, December 2012

Mueller, Bernd; Ferch, Markus; Collani, Yorck Von
US Patent Application 13/516313; 20120317576
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20120317576

Simultaneously multithreaded processing and single event failure detection method
patent-application, July 2006

Grayer, Eugene
US Patent Application 11/029706; 20060150186
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060150186

Low cost test option using redundant logic
patent-application, July 2005

Haehn, Steven L.
US Patent Application 10/752942; 20050147048
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050147048

Tracking modified pages on a computer system
patent-application, June 2006

Puthukattukaran, James J.; Shute, Derek F.
US Patent Application 10/997409; 20060117300
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060117300

Fault-detecting computer system
patent-application, June 2005

Osecky, Benjamin Daniel; Gaither, Blaine Douglas
US Patent Application 10/726976; 20050138485
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20050138485

Test method and architecture for circuits having inputs
patent-application, August 2004

Lee, Kuen-Jong; Chen, Jih-Jeen; Huang, Cheng-Hua
US Patent Application 10/441691; 20040153921
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20040153921

System for integrated data integrity verification and method thereof
patent-application, October 2006

Moyer, William C.
US Patent Application 11/094593; 20060230315
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20060230315

State History Storage for Synchronizing Redundant Processors
patent-application, July 2010

Mukherjee, Shubhendu S.; Biswas, Arijit; Racunas, Paul R.
US Patent Application 12/347961; 20100169693
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20100169693

Process for Maintaining Execution Synchronization Between Several Asynchronous Processors Working in Parallel and in a Redundant Manner
patent-application, August 2008

Ple, Christophe
US Patent Application 12/030461; 20080196037
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080196037

Parallel Data Processing Apparatus
patent-application, January 2008

Stuttard, Dave; Williams, Dave; O'Dea, Eamon
US Patent Application 11/748367; 20080008393
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20080008393

Secure virtual-machine monitor
patent-application, May 2007

Worley, JR., William S.
US Patent Application 11/588117; 20070106986
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20070106986

Processor and Signature Generation Method, and Multiple System and Multiple Execution Verification Method
patent-application, October 2009

Sato, Mitsuru
US Patent Application 12/390894; 20090249034
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20090249034

Task Execution & Management in a Clustered Computing Environment
patent-application, March 2014

Factor, Michael E.; Hadas, David; Kolodner, Elliot K.
US Patent Application 13/598638; 20140068620
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/20140068620

Processor including efficient signature generation for logic error protection
patent, January 2011

Quach, Nhon
US Patent Document 7,865,770
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/7865770

Works referencing / citing this record:

Paired value comparison for redundant multi-threading operations
patent, August 2018

Lowell, Daniel I.; Gupta, Manish
US Patent Document 10,042,687
URL: https://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/10042687

Similar Records in DOE Patents and OSTI.GOV collections:

Software only inter-compute unit redundant multithreading for GPUs

Patent Lyashevsky, Alexander; Gurumurthi, Sudhanva; Sridharan, Vilas

A system, method and computer program product to execute a first and a second work-group, and compare the signature variables of the first work-group to the signature variables of the second work-group via a synchronization mechanism. The first and the second work-group are mapped to an identifier via software. This mapping ensures that the first and second work-groups execute exactly the same data for exactly the same code without changes to the underlying hardware. By executing the first and second work-groups independently, the underlying computation of the first and second work-groups can be verified. Moreover, system performance is not substantiallymore » « less
Full Text Available
Bufferless communication for redundant multithreading using register permutation

Patent Lowell, Daniel I.; Gupta, Manish

Systems, apparatuses, and methods for implementing bufferless communication for redundant multithreading applications using register permutation are disclosed. In one embodiment, a system includes a parallel processing unit, a register file, and a scheduler. The scheduler is configured to cause execution of a plurality of threads to be performed in lockstep on the parallel processing unit. The plurality of threads include a first thread and a second thread executing on adjacent first and second lanes, respectively, of the parallel processing unit. The second thread is configured to perform a register permute operation from a first register location to a second registermore » « less
Full Text Available
Hardware based redundant multi-threading inside a GPU for improved reliability

Patent Sridharan, Vilas; Gurumurthi, Sudhanva

A system and method for verifying computation output using computer hardware are provided. Instances of computation are generated and processed on hardware-based processors. As instances of computation are processed, each instance of computation receives a load accessible to other instances of computation. Instances of output are generated by processing the instances of computation. The instances of output are verified against each other in a hardware based processor to ensure accuracy of the output.
Full Text Available
Optimizing software-directed instruction replication for GPU error detection

Patent Hari, Siva; Sullivan, Michael; Tsai, Timothy; ...

Software-only and software-hardware optimizations to reduce the overhead of intra-thread instruction duplication on a GPU or other instruction processor are disclosed. The optimizations trade off error containment for performance and include ISA extensions with limited hardware changes and area costs.
Full Text Available
Method and computer product to increase accuracy of time-based software verification for sensor networks

Patent Foo Kune, Denis [Saint Paul, MN]; Mahadevan, Karthikeyan [Mountain View, CA]

A recursive verification protocol to reduce the time variance due to delays in the network by putting the subject node at most one hop from the verifier node provides for an efficient manner to test wireless sensor nodes. Since the software signatures are time based, recursive testing will give a much cleaner signal for positive verification of the software running on any one node in the sensor network. In this protocol, the main verifier checks its neighbor, who in turn checks its neighbor, and continuing this process until all nodes have been verified. This ensures minimum time delays for themore » « less
Full Text Available

Similar Records

Title: Software only intra-compute unit redundant multithreading for GPUs

Abstract

Citation Formats

Parallel data processing apparatus patent-application, November 2002

Method for transmitting data patent-application, July 2006

Control of multiple computer processes using a mutual exclusion primitive ordering mechanism patent, December 2002

Method and apparatus for computer system reliability patent-application, August 2002

Error handling system in a redundant processor patent-application, November 2005

method for operating an arithmetic unit patent-application, December 2012

Simultaneously multithreaded processing and single event failure detection method patent-application, July 2006

Low cost test option using redundant logic patent-application, July 2005

Tracking modified pages on a computer system patent-application, June 2006

Fault-detecting computer system patent-application, June 2005

Test method and architecture for circuits having inputs patent-application, August 2004

System for integrated data integrity verification and method thereof patent-application, October 2006

State History Storage for Synchronizing Redundant Processors patent-application, July 2010

Process for Maintaining Execution Synchronization Between Several Asynchronous Processors Working in Parallel and in a Redundant Manner patent-application, August 2008

Parallel Data Processing Apparatus patent-application, January 2008

Secure virtual-machine monitor patent-application, May 2007

Processor and Signature Generation Method, and Multiple System and Multiple Execution Verification Method patent-application, October 2009

Task Execution & Management in a Clustered Computing Environment patent-application, March 2014

Processor including efficient signature generation for logic error protection patent, January 2011

Paired value comparison for redundant multi-threading operations patent, August 2018

Parallel data processing apparatus
patent-application, November 2002

Method for transmitting data
patent-application, July 2006

Control of multiple computer processes using a mutual exclusion primitive ordering mechanism
patent, December 2002

Method and apparatus for computer system reliability
patent-application, August 2002

Error handling system in a redundant processor
patent-application, November 2005

method for operating an arithmetic unit
patent-application, December 2012

Simultaneously multithreaded processing and single event failure detection method
patent-application, July 2006

Low cost test option using redundant logic
patent-application, July 2005

Tracking modified pages on a computer system
patent-application, June 2006

Fault-detecting computer system
patent-application, June 2005

Test method and architecture for circuits having inputs
patent-application, August 2004

System for integrated data integrity verification and method thereof
patent-application, October 2006

State History Storage for Synchronizing Redundant Processors
patent-application, July 2010

Process for Maintaining Execution Synchronization Between Several Asynchronous Processors Working in Parallel and in a Redundant Manner
patent-application, August 2008

Parallel Data Processing Apparatus
patent-application, January 2008

Secure virtual-machine monitor
patent-application, May 2007

Processor and Signature Generation Method, and Multiple System and Multiple Execution Verification Method
patent-application, October 2009

Task Execution & Management in a Clustered Computing Environment
patent-application, March 2014

Processor including efficient signature generation for logic error protection
patent, January 2011

Paired value comparison for redundant multi-threading operations
patent, August 2018