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Title: Method for reuse of wafers for growth of vertically-aligned wire arrays


Reusing a Si wafer for the formation of wire arrays by transferring the wire arrays to a polymer matrix, reusing a patterned oxide for several array growths, and finally polishing and reoxidizing the wafer surface and reapplying the patterned oxide.

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Research Org.:
California Institute of Technology (CalTech), Pasadena, CA (United States)
Sponsoring Org.:
OSTI Identifier:
Patent Number(s):
Application Number:
California Institute of Technology (Pasadena, CA)
Patent Classifications (CPCs):
DOE Contract Number:  
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Resource Relation:
Patent File Date: 2008-07-18
Country of Publication:
United States

Citation Formats

Spurgeon, Joshua M., Plass, Katherine E., Lewis, Nathan S., and Atwater, Harry A. Method for reuse of wafers for growth of vertically-aligned wire arrays. United States: N. p., 2011. Web.
Spurgeon, Joshua M., Plass, Katherine E., Lewis, Nathan S., & Atwater, Harry A. Method for reuse of wafers for growth of vertically-aligned wire arrays. United States.
Spurgeon, Joshua M., Plass, Katherine E., Lewis, Nathan S., and Atwater, Harry A. Tue . "Method for reuse of wafers for growth of vertically-aligned wire arrays". United States.
title = {Method for reuse of wafers for growth of vertically-aligned wire arrays},
author = {Spurgeon, Joshua M. and Plass, Katherine E. and Lewis, Nathan S. and Atwater, Harry A.},
abstractNote = {Reusing a Si wafer for the formation of wire arrays by transferring the wire arrays to a polymer matrix, reusing a patterned oxide for several array growths, and finally polishing and reoxidizing the wafer surface and reapplying the patterned oxide.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2011},
month = {3}

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