Ground-referenced single-ended memory interconnect

Dally, William J.

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Title: Ground-referenced single-ended memory interconnect

Abstract

A system is provided for transmitting signals. The system includes a ground-referenced single-ended signaling (GRS) driver circuit that is configured to pre-charge a first capacitor to store a first charge between a first output node and a first reference node based on a first input data signal during a first pre-charge phase and drive an output signal relative to a ground network based on the first charge during a first drive phase. A control circuit is configured to generate a first set of control signals based on the first input data signal and a first clock signal, where the first set of control signals causes the first GRS driver circuit to operate in either the first pre-charge phase or in the first drive phase.

Inventors:: Dally, William J.

Issue Date:: 2015-10-06

Research Org.:: NVIDIA Corp., Santa Clara, CA (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1531816

Patent Number(s):: 9153314

Application Number:: 13/890,899

Assignee:: NVIDIA Corporation (Santa Clara, CA)

Patent Classifications (CPCs):: G - PHYSICS G11 - INFORMATION STORAGE G11C - STATIC STORES

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

Show more

G - PHYSICS G11 - INFORMATION STORAGE G11C - STATIC STORES
G11C11/4096 - Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
G11C7/1057 - {Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load}
G11C7/1069 - {I/O lines read out arrangements

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
H01L2224/0401 - Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
H01L2224/16145 - the bodies being stacked
H01L2224/16227 - the bump connector connecting to a bond pad of the item
H01L2224/16235 - the bump connector connecting to a via metallisation of the item
H01L2924/15192 - Resurf arrangement of the internal vias
H01L2924/15311 - being a ball array, e.g. BGA

Show less

DOE Contract Number:: B599861

Resource Type:: Patent

Resource Relation:: Patent File Date: 2013-05-09

Country of Publication:: United States

Language:: English

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                    Dally, William J. Ground-referenced single-ended memory interconnect.  United States: N. p., 2015. 
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                    Dally, William J. Ground-referenced single-ended memory interconnect.  United States.

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                    Dally, William J. Tue .  
        "Ground-referenced single-ended memory interconnect".  United States.  https://www.osti.gov/servlets/purl/1531816.

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@article{osti_1531816,

  title        = {Ground-referenced single-ended memory interconnect},

  author       = {Dally, William J.},

  abstractNote = {A system is provided for transmitting signals. The system includes a ground-referenced single-ended signaling (GRS) driver circuit that is configured to pre-charge a first capacitor to store a first charge between a first output node and a first reference node based on a first input data signal during a first pre-charge phase and drive an output signal relative to a ground network based on the first charge during a first drive phase. A control circuit is configured to generate a first set of control signals based on the first input data signal and a first clock signal, where the first set of control signals causes the first GRS driver circuit to operate in either the first pre-charge phase or in the first drive phase.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2015},

  month        = {10}

}

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