Multi-phase ground-referenced single-ended signaling
Abstract
A system includes a control circuit and first, second, and third ground-referenced single-ended signaling (GRS) driver circuits that are each coupled to an output signal. The control circuit is configured to generate a first, second, and third set of control signals that are each based on a respective phase of a clock signal. Each GRS driver circuit is configured to pre-charge a capacitor to store a charge based on the respective set of control signals during at least one phase of the clock signal and drive the output signal relative to a ground network by discharging the charge during a respective phase of the clock signal.
- Inventors:
- Issue Date:
- Research Org.:
- NVIDIA Corp., Santa Clara, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1531809
- Patent Number(s):
- 9076551
- Application Number:
- 13/933,058
- Assignee:
- NVIDIA Corporation (Santa Clara, CA)
- Patent Classifications (CPCs):
-
G - PHYSICS G11 - INFORMATION STORAGE G11C - STATIC STORES
- DOE Contract Number:
- B599861
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2013-07-01
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING; 97 MATHEMATICS AND COMPUTING
Citation Formats
Dally, William J., Poulton, John W., and Greer, III, Thomas Hastings. Multi-phase ground-referenced single-ended signaling. United States: N. p., 2015.
Web.
Dally, William J., Poulton, John W., & Greer, III, Thomas Hastings. Multi-phase ground-referenced single-ended signaling. United States.
Dally, William J., Poulton, John W., and Greer, III, Thomas Hastings. Tue .
"Multi-phase ground-referenced single-ended signaling". United States. https://www.osti.gov/servlets/purl/1531809.
@article{osti_1531809,
title = {Multi-phase ground-referenced single-ended signaling},
author = {Dally, William J. and Poulton, John W. and Greer, III, Thomas Hastings},
abstractNote = {A system includes a control circuit and first, second, and third ground-referenced single-ended signaling (GRS) driver circuits that are each coupled to an output signal. The control circuit is configured to generate a first, second, and third set of control signals that are each based on a respective phase of a clock signal. Each GRS driver circuit is configured to pre-charge a capacitor to store a charge based on the respective set of control signals during at least one phase of the clock signal and drive the output signal relative to a ground network by discharging the charge during a respective phase of the clock signal.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Jul 07 00:00:00 EDT 2015},
month = {Tue Jul 07 00:00:00 EDT 2015}
}
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