Methods and apparatus for parallel execution of a process

Husbands, Parry Jones Reginald; Choy, Long Yin; Edelman, Alan; Jansen, Eckart; Shah, Viral B.

Title: Methods and apparatus for parallel execution of a process

Abstract

In one embodiment, a process may be performed in parallel on a parallel server by defining a data type that may be used to reference data stored on the parallel server and overloading a previously-defined operation, such that when the overloaded operation is called, a command is sent to the parallel server to manipulate the data stored on the parallel server. In some embodiments, the previously-defined operation that is overloaded may be an operation of an operating system. Further, in some embodiments, when the data stored on the parallel server is no longer needed, a command may be sent to the parallel server to reallocate the memory used to store the data.

Inventors:: Husbands, Parry Jones Reginald; Choy, Long Yin; Edelman, Alan; Jansen, Eckart; Shah, Viral B.

Issue Date:: 2010-10-12

Research Org.:: Massachusetts Inst. of Technology (MIT), Cambridge, MA (United States); Univ. of California, Oakland, CA (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1531655

Patent Number(s):: 7814462

Application Number:: 11/217,114

Assignee:: Massachusetts Institute of Technology (Cambridge, MA); The Regents of the University of California (Oakland, CA)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

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G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F12/0253 - {Garbage collection, i.e. reclamation of unreferenced memory}

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DOE Contract Number:: F19628-00-C-0002; F30602-02-1-0181; FG02-04ER25631; FG02-04ER25632; CCR9404326; DMS9971591

Resource Type:: Patent

Resource Relation:: Patent File Date: 2005-08-31

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING

Citation Formats


                    Husbands, Parry Jones Reginald, Choy, Long Yin, Edelman, Alan, Jansen, Eckart, and Shah, Viral B. Methods and apparatus for parallel execution of a process.  United States: N. p., 2010. 
        Web.

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                    Husbands, Parry Jones Reginald, Choy, Long Yin, Edelman, Alan, Jansen, Eckart, & Shah, Viral B. Methods and apparatus for parallel execution of a process.  United States.

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                    Husbands, Parry Jones Reginald, Choy, Long Yin, Edelman, Alan, Jansen, Eckart, and Shah, Viral B. Tue .  
        "Methods and apparatus for parallel execution of a process".  United States.  https://www.osti.gov/servlets/purl/1531655.

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@article{osti_1531655,

  title        = {Methods and apparatus for parallel execution of a process},

  author       = {Husbands, Parry Jones Reginald and Choy, Long Yin and Edelman, Alan and Jansen, Eckart and Shah, Viral B.},

  abstractNote = {In one embodiment, a process may be performed in parallel on a parallel server by defining a data type that may be used to reference data stored on the parallel server and overloading a previously-defined operation, such that when the overloaded operation is called, a command is sent to the parallel server to manipulate the data stored on the parallel server. In some embodiments, the previously-defined operation that is overloaded may be an operation of an operating system. Further, in some embodiments, when the data stored on the parallel server is no longer needed, a command may be sent to the parallel server to reallocate the memory used to store the data.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2010},

  month        = {10}

}

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Works referenced in this record:

The Hierarchically Tiled Arrays programming approach
conference, January 2004

Fraguela, Basilio B.; Guo, Jia; Bikshandi, Ganesh
Proceedings of the 7th workshop on Workshop on languages, compilers, and run-time support for scalable systems - LCR '04
https://doi.org/10.1145/1066650.1066657

MultiMATLAB: integrating MATLAB with high-performance parallel computing
conference, January 1997

Menon, Vijay; Trefethen, Anne E.
Proceedings of the 1997 ACM/IEEE conference on Supercomputing (CDROM) - Supercomputing '97
https://doi.org/10.1145/509593.509623

Object oriented program memory management system and method using fixed sized memory pools
patent, August 2001

Weldon, Jr., Richard S.; Kenney, Robert D.; Miller, Daniel L.
US Patent Document 6,275,916
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=6275916

Method for reusing temporaries and reclaiming shared memory
patent, July 1996

Hildebrandt, Thomas Henry
US Patent Document 5,535,390
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=5535390

Apparatus and method for improved devirtualization of method calls
patent, August 2004

Blandy, Geoffrey; Johnson, Andrew
US Patent Document 6,779,188
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=6779188

Data driven type information processing apparatus including plural data driven type processors and plural memories
patent, June 1999

Miyama, Ryuji; Yoshida, Shinichi; Muramatsu, Tsuyoshi
US Patent Document 5,918,063
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=5918063

Plural processor inferencing system and method
patent, January 1991

Oyanagi, Shigeru; Fujita, Sumikazu; Nakamura, Sadao
US Patent Document 4,982,340
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=4982340

Dynamic hierarchial associative memory
patent, August 1994

Frank, Steven J.; Binder, Paul A.
US Patent Document 5,341,483
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=5341483

System for controlling telecommunication overload traffic
patent, July 2001

Hunt, Rowland
US Patent Document 6,259,776
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=6259776

Availability in clustered application servers
patent, March 2004

Leymann, Frank; Roller, Dieter Helmut
US Patent Document 6,711,606
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=6711606

Data driven type information processing apparatus
patent, December 1996

Miyama, Ryuji; Yoshida, Shinichi; Muramatsu, Tsuyoshi
US Patent Document 5,586,281
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=5586281

Computer memory management system
patent, July 2002

Kirk, III, Whitson John
US Patent Document 6,421,690
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=6421690

Parallel data processing system combining a SIMD unit with a MIMD unit and sharing a common bus, memory, and system controller
patent, October 1994

Kan, Takashi
US Patent Document 5,355,508
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=5355508

Data processing method and system utilizing parallel processing
patent, August 1999

Mouradian, Gary C.
US Patent Document 5,943,663
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=5943663

Synchronous parallel system for emulation and discrete event simulation
patent, November 2001

Steinman, Jeffrey S.
US Patent Document 6,324,495
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=6324495

Method for managing dynamic relations between objects in dynamic object-oriented languages
patent, February 1999

Mitchell, David C.; Anderson, Kelly L.; Osman, Andrew V.
US Patent Document 5,872,973
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=5872973

Grammer for regular expressions
patent, August 2006

Nuss, Andrew
US Patent Document 7,093,231
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=7093231

System and method for dynamic modification of class files
patent, February 2000

Berry, Robert Francis; Hussain, Riaz Y.
US Patent Document 6,026,237
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=6026237

Nested parallel language preprocessor for converting parallel language programs into sequential code
patent, August 2000

Hardwick, Jonathan C.
US Patent Document 6,106,575
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=6106575

Polymorphic regular expressions
patent-application, May 2005

Nuss, Andrew
US Patent Application 10/818346; 20050097514
URL: http://appft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PG01&p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.html&r=1&f=G&l=50&s1=%2220050097514%22.PGNR.&OS=DN/20050097514&RS=DN/20050097514

Works referencing / citing this record:

Dynamic memory management system and method
patent, August 2011

Rouson, Damian
US Patent Document 8,010,943
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=8010943

Programming a multi-processor system
patent, May 2018

Beardslee, John Mark; Doerr, Michael B.; Eng, Tommy K.
US Patent Document 9,965,258
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9965258

Programming a multi-processor system
patent, February 2016

Beardslee, John Mark; Doerr, Michael B.; Eng, Tommy K.
US Patent Document 9,250,867
URL: http://patft.uspto.gov/netacgi/nph-Parser?patentnumber=9250867

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Title: Methods and apparatus for parallel execution of a process

Abstract

Citation Formats

The Hierarchically Tiled Arrays programming approach conference, January 2004

MultiMATLAB: integrating MATLAB with high-performance parallel computing conference, January 1997

Object oriented program memory management system and method using fixed sized memory pools patent, August 2001

Method for reusing temporaries and reclaiming shared memory patent, July 1996

Apparatus and method for improved devirtualization of method calls patent, August 2004

Data driven type information processing apparatus including plural data driven type processors and plural memories patent, June 1999

Plural processor inferencing system and method patent, January 1991

Dynamic hierarchial associative memory patent, August 1994

System for controlling telecommunication overload traffic patent, July 2001

Availability in clustered application servers patent, March 2004

Data driven type information processing apparatus patent, December 1996

Computer memory management system patent, July 2002

Parallel data processing system combining a SIMD unit with a MIMD unit and sharing a common bus, memory, and system controller patent, October 1994

Data processing method and system utilizing parallel processing patent, August 1999

Synchronous parallel system for emulation and discrete event simulation patent, November 2001

Method for managing dynamic relations between objects in dynamic object-oriented languages patent, February 1999

Grammer for regular expressions patent, August 2006

System and method for dynamic modification of class files patent, February 2000

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Polymorphic regular expressions patent-application, May 2005

Dynamic memory management system and method patent, August 2011

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The Hierarchically Tiled Arrays programming approach
conference, January 2004

MultiMATLAB: integrating MATLAB with high-performance parallel computing
conference, January 1997

Object oriented program memory management system and method using fixed sized memory pools
patent, August 2001

Method for reusing temporaries and reclaiming shared memory
patent, July 1996

Apparatus and method for improved devirtualization of method calls
patent, August 2004

Data driven type information processing apparatus including plural data driven type processors and plural memories
patent, June 1999

Plural processor inferencing system and method
patent, January 1991

Dynamic hierarchial associative memory
patent, August 1994

System for controlling telecommunication overload traffic
patent, July 2001

Availability in clustered application servers
patent, March 2004

Data driven type information processing apparatus
patent, December 1996

Computer memory management system
patent, July 2002

Parallel data processing system combining a SIMD unit with a MIMD unit and sharing a common bus, memory, and system controller
patent, October 1994

Data processing method and system utilizing parallel processing
patent, August 1999

Synchronous parallel system for emulation and discrete event simulation
patent, November 2001

Method for managing dynamic relations between objects in dynamic object-oriented languages
patent, February 1999

Grammer for regular expressions
patent, August 2006

System and method for dynamic modification of class files
patent, February 2000

Nested parallel language preprocessor for converting parallel language programs into sequential code
patent, August 2000

Polymorphic regular expressions
patent-application, May 2005

Dynamic memory management system and method
patent, August 2011

Programming a multi-processor system
patent, May 2018

Programming a multi-processor system
patent, February 2016