Dynamic memory remapping to reduce row-buffer conflicts
Abstract
A data processing system includes a memory that includes a first memory bank and a second memory bank. The data processing system also includes a conflict detector connected to the memory and adapted to receive memory access information. The conflict detector tracks memory access statistics of the first memory bank, and determines if the first memory bank contains frequent row conflicts. The conflict detector also remaps a frequent row conflict in the first memory bank to the second memory bank. An indirection table is connected to the conflict detector and adapted to receive a memory access request, and redirects an address into a dynamically selected physical memory address in response to a remapping of the frequent row conflict to the second memory bank.
- Inventors:
- Issue Date:
- Research Org.:
- Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1531406
- Patent Number(s):
- 10198369
- Application Number:
- 15/469,071
- Assignee:
- Advanced Micro Devices, Inc. (Santa Clara, CA)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
Y - NEW / CROSS SECTIONAL TECHNOLOGIES Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE Y02D - CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWN ENERGY USE
- DOE Contract Number:
- AC52-07NA27344; B609201
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2017-03-24
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Eckert, Yasuko, Panda, Reena, and Jayasena, Nuwan. Dynamic memory remapping to reduce row-buffer conflicts. United States: N. p., 2019.
Web.
Eckert, Yasuko, Panda, Reena, & Jayasena, Nuwan. Dynamic memory remapping to reduce row-buffer conflicts. United States.
Eckert, Yasuko, Panda, Reena, and Jayasena, Nuwan. Tue .
"Dynamic memory remapping to reduce row-buffer conflicts". United States. https://www.osti.gov/servlets/purl/1531406.
@article{osti_1531406,
title = {Dynamic memory remapping to reduce row-buffer conflicts},
author = {Eckert, Yasuko and Panda, Reena and Jayasena, Nuwan},
abstractNote = {A data processing system includes a memory that includes a first memory bank and a second memory bank. The data processing system also includes a conflict detector connected to the memory and adapted to receive memory access information. The conflict detector tracks memory access statistics of the first memory bank, and determines if the first memory bank contains frequent row conflicts. The conflict detector also remaps a frequent row conflict in the first memory bank to the second memory bank. An indirection table is connected to the conflict detector and adapted to receive a memory access request, and redirects an address into a dynamically selected physical memory address in response to a remapping of the frequent row conflict to the second memory bank.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2019},
month = {2}
}
Works referenced in this record:
System and method for remapping defective memory locations
patent, January 1999
- Jeddeloh, Joseph M.
- US Patent Document 5,862,314
Finding frequent items in data streams
journal, January 2004
- Charikar, Moses; Chen, Kevin; Farach-Colton, Martin
- Theoretical Computer Science, Vol. 312, Issue 1
System, apparatus, and method for transparent page level instruction translation
patent, May 2016
- Caprioli, Paul; Shanbhogue, Vedvyas; Yamada, Koichi
- US Patent Document 9,330,020
A simple algorithm for finding frequent elements in streams and bags
journal, March 2003
- Karp, Richard M.; Shenker, Scott; Papadimitriou, Christos H.
- ACM Transactions on Database Systems, Vol. 28, Issue 1
Arbiter system for central processing unit having dual dominoed encoders for four instruction issue per machine cycle
patent, June 2001
- Farrell, James Arthur; Gieseke, Bruce A.
- US Patent Document 6,249,855