skip to main content
DOE Patents title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Method and apparatus of performing a memory operation in a hierarchical memory assembly

Abstract

A method and apparatus of performing a memory operation includes receiving a memory operation request at a first memory controller that is in communication with a second memory controller. The first memory controller forwards the memory operation request to the second memory controller. Upon receipt of the memory operation request, the second memory controller provides first information or second information depending on a condition of a pseudo-bank of the second memory controller and a type of the memory operation request.

Inventors:
Issue Date:
Research Org.:
Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1524993
Patent Number(s):
10216454
Application Number:
15/686,121
Assignee:
Advanced Micro Devices, Inc. (Sunnyvale, CA)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
AC52-07NA27344; B608045
Resource Type:
Patent
Resource Relation:
Patent File Date: 2017-08-24
Country of Publication:
United States
Language:
English
Subject:
96 KNOWLEDGE MANAGEMENT AND PRESERVATION

Citation Formats

Yudanov, Dmitri. Method and apparatus of performing a memory operation in a hierarchical memory assembly. United States: N. p., 2019. Web.
Yudanov, Dmitri. Method and apparatus of performing a memory operation in a hierarchical memory assembly. United States.
Yudanov, Dmitri. Tue . "Method and apparatus of performing a memory operation in a hierarchical memory assembly". United States. https://www.osti.gov/servlets/purl/1524993.
@article{osti_1524993,
title = {Method and apparatus of performing a memory operation in a hierarchical memory assembly},
author = {Yudanov, Dmitri},
abstractNote = {A method and apparatus of performing a memory operation includes receiving a memory operation request at a first memory controller that is in communication with a second memory controller. The first memory controller forwards the memory operation request to the second memory controller. Upon receipt of the memory operation request, the second memory controller provides first information or second information depending on a condition of a pseudo-bank of the second memory controller and a type of the memory operation request.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2019},
month = {2}
}

Patent:

Save / Share: