Title: Formation of superhydrophobic surfaces

Abstract

Technologies are described for methods and systems effective for etching nanostructures in a substrate. The methods may comprise depositing a patterned block copolymer on the substrate. The methods may comprise applying a precursor to the patterned block copolymer to generate an infiltrated block copolymer. The precursor may infiltrate into the first polymer block domain and generate a material. The methods may comprise applying a removal agent effective to remove the polymer block domains to the infiltrated block copolymer to generate a pattern of the material. The methods may comprise etching the substrate. The pattern of the material may mask the substrate to pattern the etching. The etching may be performed under conditions to produce nanostructures in the substrate. The methods may comprise removing the pattern of the material and coating the nanostructures and the surface of the substrate with a hydrophobic coating.

Inventors:

Checco, Antonio; Black, Charles T.; Rahman, Atikur; Ocko, Benjamin M.

Issue Date:

2019-01-29

Research Org.:

Brookhaven National Lab. (BNL), Upton, NY (United States)

Sponsoring Org.:

USDOE

OSTI Identifier:

1500088

Patent Number(s):

10189704

Application Number:

14/897,441

Assignee:

Brookhaven Science Associates, LLC (Upton, NY)

Patent Classifications (CPCs):

G - PHYSICS G02 - OPTICS G02B - OPTICAL ELEMENTS, SYSTEMS, OR APPARATUS

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

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G - PHYSICS G02 - OPTICS G02B - OPTICAL ELEMENTS, SYSTEMS, OR APPARATUS

G02B1/18 - Coatings for keeping optical surfaces clean, e.g. hydrophobic or photo-catalytic films
G02B1/118 - having sub-optical wavelength surface structures designed to provide an enhanced transmittance, e.g. moth-eye structures

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

H01L21/3065 - Plasma etching
H01L21/0273 - {characterised by the treatment of photoresist layers}

B - PERFORMING OPERATIONS B81 - MICROSTRUCTURAL TECHNOLOGY B81C - PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS

B81C2201/0149 - Forming nanoscale microstructures using auto-arranging or self-assembling material
B81C1/00111 - {Tips, pillars, i.e. raised structures

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01J - ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS

H01J2237/334 - Etching

G - PHYSICS G03 - PHOTOGRAPHY G03F - PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES

G03F7/0002 - {Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping}

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

H01L21/0271 - {comprising organic layers}

G - PHYSICS G03 - PHOTOGRAPHY G03F - PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES

G03F7/405 - {Treatment with inorganic or organometallic reagents after imagewise removal}

B - PERFORMING OPERATIONS B81 - MICROSTRUCTURAL TECHNOLOGY B81C - PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS

B81C1/00 - Manufacture or treatment of devices or systems in or on a substrate

H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES

H01L21/0337 - {characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment}
H01L21/3086 - {characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment}

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DOE Contract Number:  

AC02-98CH10886

Resource Type:

Patent

Resource Relation:

Patent File Date: 2014 Jun 13

Country of Publication:

United States

Language:

English