Global to push GA events into
skip to main content

Title: Magnetoelectric memory cells with domain-wall-mediated switching

A magnetoelectric memory cell with domain-wall-mediated switching is implemented using a split gate architecture. The split gate architecture allows a domain wall to be trapped within a magnetoelectric antiferromagnetic (MEAF) active layer. An extension of this architecture applies to multiple-gate linear arrays that can offer advantages in memory density, programmability, and logic functionality. Applying a small anisotropic in-plane shear strain to the MEAF can block domain wall precession to improve reliability and speed of switching.
Inventors:
; ; ;
Issue Date:
OSTI Identifier:
1489788
Assignee:
BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA (Lincoln, NE); THE JOHN HOPKINS UNIVERSITY (Baltimore, MD); INTEL CORPORATION (Santa Clara, CA) CHO
Patent Number(s):
10,090,034
Application Number:
15/807,369
Contract Number:
FG02-08ER46544; SC0014189
Resource Relation:
Patent File Date: 2017 Nov 08
Research Org:
BOARD OF REGENTS OF THE UNIVERSITY OF NEBRASKA, Lincoln, NE (United States); THE JOHN HOPKINS UNIVERSITY, Baltimore, MD (United States); INTEL CORPORATION, Santa Clara, CA (United States)
Sponsoring Org:
USDOE
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING