Method for instruction sequence execution analysis and visualization

Sundermier, Amy; Arpin, Bettina K.; Karmol, David; Ray, Lawrence P.; Munoz, Kenneth Michael; Lawry, William; Coram, Jamie L.; Artale, Thomas Anthony; DeMoss, Patrick; Nunno, Lucas Leighton; Easter, Aaron

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A - human necessities
A01 - agriculture
A21 - baking
A22 - butchering
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A24 - tobacco
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A42 - headwear
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A44 - haberdashery
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A47 - furniture
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A99 - subject matter not otherwise provided for in this section
B - performing operations
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Title: Method for instruction sequence execution analysis and visualization

Abstract

Various technologies pertaining to computer-executable instruction sequence forensics are described herein. In a general embodiment, an application development framework supports a function library that includes a plurality of recording functions. Calls to these functions are inserted into source code or bytecode of the computer-executable instruction sequence. The source code is then compiled, resulting in formation of instrumented machine code of the computer-executable instruction sequence. Alternately, the runtime environment interprets instrumented bytecode for the instruction sequence. A processor executes the machine code, and the called functions cause the processor to generate forensic data pertaining to portions of the computer-executable instruction sequence that correspond to locations in the source code where the calls were inserted. An execution instance of the computer-executable instruction sequence is visualized based upon the forensic data.

Inventors:: Sundermier, Amy; Arpin, Bettina K.; Karmol, David; Ray, Lawrence P.; Munoz, Kenneth Michael; Lawry, William; Coram, Jamie L.; Artale, Thomas Anthony; DeMoss, Patrick; Nunno, Lucas Leighton; Easter, Aaron

Issue Date:: Tue Sep 11 00:00:00 EDT 2018

Research Org.:: Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1478644

Patent Number(s):: 10073764

Application Number:: 14/812,842

Assignee:: National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

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G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F11/3664 - {Environments for testing or debugging software}
G06F11/3688 - {for test execution, e.g. scheduling of test suites}
G06F11/3692 - {for test results analysis}
G06F8/20 - Software design
G06F8/41 - Compilation
G06F8/70 - Software maintenance or management
G06F8/75 - Structural analysis for program understanding

Show less

DOE Contract Number:: AC04-94AL85000

Resource Type:: Patent

Resource Relation:: Patent File Date: 2015 Jul 29

Country of Publication:: United States

Language:: English

Citation Formats


                    Sundermier, Amy, Arpin, Bettina K., Karmol, David, Ray, Lawrence P., Munoz, Kenneth Michael, Lawry, William, Coram, Jamie L., Artale, Thomas Anthony, DeMoss, Patrick, Nunno, Lucas Leighton, and Easter, Aaron. Method for instruction sequence execution analysis and visualization.  United States: N. p., 2018. 
        Web.

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                    Sundermier, Amy, Arpin, Bettina K., Karmol, David, Ray, Lawrence P., Munoz, Kenneth Michael, Lawry, William, Coram, Jamie L., Artale, Thomas Anthony, DeMoss, Patrick, Nunno, Lucas Leighton, & Easter, Aaron. Method for instruction sequence execution analysis and visualization.  United States.

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                    Sundermier, Amy, Arpin, Bettina K., Karmol, David, Ray, Lawrence P., Munoz, Kenneth Michael, Lawry, William, Coram, Jamie L., Artale, Thomas Anthony, DeMoss, Patrick, Nunno, Lucas Leighton, and Easter, Aaron. Tue .  
        "Method for instruction sequence execution analysis and visualization".  United States.  https://www.osti.gov/servlets/purl/1478644.

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@article{osti_1478644,

  title        = {Method for instruction sequence execution analysis and visualization},

  author       = {Sundermier, Amy and Arpin, Bettina K. and Karmol, David and Ray, Lawrence P. and Munoz, Kenneth Michael and Lawry, William and Coram, Jamie L. and Artale, Thomas Anthony and DeMoss, Patrick and Nunno, Lucas Leighton and Easter, Aaron},

  abstractNote = {Various technologies pertaining to computer-executable instruction sequence forensics are described herein. In a general embodiment, an application development framework supports a function library that includes a plurality of recording functions. Calls to these functions are inserted into source code or bytecode of the computer-executable instruction sequence. The source code is then compiled, resulting in formation of instrumented machine code of the computer-executable instruction sequence. Alternately, the runtime environment interprets instrumented bytecode for the instruction sequence. A processor executes the machine code, and the called functions cause the processor to generate forensic data pertaining to portions of the computer-executable instruction sequence that correspond to locations in the source code where the calls were inserted. An execution instance of the computer-executable instruction sequence is visualized based upon the forensic data.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {Tue Sep 11 00:00:00 EDT 2018},

  month        = {Tue Sep 11 00:00:00 EDT 2018}

}

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Title: Method for instruction sequence execution analysis and visualization

Abstract

Citation Formats

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Converting an Activity Diagram into Code
patent-application, April 2011

Systems and Methods for Demarcating Information Related to One or More Blocks in and Application
patent-application, June 2013

Post-pass binary adaptation for software-based speculative precomputation
patent-application, March 2004

HTML5 Graph Overlays for Application Topology
patent-application, December 2015

Automatic Program Partition For Targeted Replay
patent-application, May 2012

Visualizing Multiple Program Executions to Assist Behavior Verification
conference, July 2009

Systems and Methods for Visualization of Exception Handling Constructs
patent-application, March 2011

Method for identifying problematic loops in an application and devices thereof
patent, May 2015

Methods and systems for automatically testing software
patent, April 2017

Generation of Parallel Code Representations
patent-application, December 2010

Program analysis device, analysis method and program of same
patent-application, September 2005

Automatic Generation of Run-Time Instrumenter
patent-application, October 2009

Method and Apparatus for Test Coverage Analysis
patent-application, August 2011

Historical Control Flow Visualization in Production Diagnostics
patent-application, May 2016

Program slicing for codesign of embedded systems
patent, November 2009

Method for Identifying Problematic Loops in an Application and Devices Thereof
patent-application, March 2013

Systems and methods for demarcating information related to one or more blocks in an application
patent, October 2014

Method and system for finding evolving regions in graphs without persistent node identity
patent-application, January 2007

Reverse Dependency Injections in a System with Dynamic Code Loading
patent-application, March 2016

Operation behavior modeling using relation identification and visualization algorithms
conference, August 2013

Automatic region-based verification of garbage collectors
patent, July 2014

Visualization of exception handling constructs to support program understanding
conference, January 2008

Systems and methods for visualization of data analysis
patent, March 2015

Information visualization system
patent, July 2011