DOE Patents title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Collective network for computer structures

Abstract

A system and method for enabling high-speed, low-latency global collective communications among interconnected processing nodes. The global collective network optimally enables collective reduction operations to be performed during parallel algorithm operations executing in a computer structure having a plurality of the interconnected processing nodes. Router devices are included that interconnect the nodes of the network via links to facilitate performance of low-latency global processing operations at nodes of the virtual network and class structures. The global collective network may be configured to provide global barrier and interrupt functionality in asynchronous or synchronized manner. When implemented in a massively-parallel supercomputing structure, the global collective network is physically and logically partitionable according to needs of a processing algorithm.

Inventors:
; ; ; ; ; ; ; ; ;
Issue Date:
Research Org.:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1471566
Patent Number(s):
10069599
Application Number:
14/972,945
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
H - ELECTRICITY H03 - BASIC ELECTRONIC CIRCUITRY H03M - CODING
DOE Contract Number:  
B517552
Resource Type:
Patent
Resource Relation:
Patent File Date: 2015 Dec 17
Country of Publication:
United States
Language:
English

Citation Formats

Blumrich, Matthias A., Coteus, Paul W., Chen, Dong, Gara, Alan, Giampapa, Mark E., Heidelberger, Philip, Hoenicke, Dirk, Takken, Todd E., Steinmacher-Burow, Burkhard D., and Vranas, Pavlos M. Collective network for computer structures. United States: N. p., 2018. Web.
Blumrich, Matthias A., Coteus, Paul W., Chen, Dong, Gara, Alan, Giampapa, Mark E., Heidelberger, Philip, Hoenicke, Dirk, Takken, Todd E., Steinmacher-Burow, Burkhard D., & Vranas, Pavlos M. Collective network for computer structures. United States.
Blumrich, Matthias A., Coteus, Paul W., Chen, Dong, Gara, Alan, Giampapa, Mark E., Heidelberger, Philip, Hoenicke, Dirk, Takken, Todd E., Steinmacher-Burow, Burkhard D., and Vranas, Pavlos M. Tue . "Collective network for computer structures". United States. https://www.osti.gov/servlets/purl/1471566.
@article{osti_1471566,
title = {Collective network for computer structures},
author = {Blumrich, Matthias A. and Coteus, Paul W. and Chen, Dong and Gara, Alan and Giampapa, Mark E. and Heidelberger, Philip and Hoenicke, Dirk and Takken, Todd E. and Steinmacher-Burow, Burkhard D. and Vranas, Pavlos M.},
abstractNote = {A system and method for enabling high-speed, low-latency global collective communications among interconnected processing nodes. The global collective network optimally enables collective reduction operations to be performed during parallel algorithm operations executing in a computer structure having a plurality of the interconnected processing nodes. Router devices are included that interconnect the nodes of the network via links to facilitate performance of low-latency global processing operations at nodes of the virtual network and class structures. The global collective network may be configured to provide global barrier and interrupt functionality in asynchronous or synchronized manner. When implemented in a massively-parallel supercomputing structure, the global collective network is physically and logically partitionable according to needs of a processing algorithm.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2018},
month = {9}
}

Works referenced in this record:

Packet switch network protocol
patent, August 1989


Self-synchronous packet scrambler
patent, November 1998


Multi-protocol dual fiber link laser diode controller and method
patent, September 1999


Distributed precomputation of network signal paths with table-based link capacity control
patent, February 2000


Architecture for lightweight signaling in ATM networks
patent, April 2003


Global interrupt and barrier networks
patent, October 2008


Global interrupt and barrier networks
patent-application, April 2004


Arithmetic functions in torus and tree networks
patent-application, April 2004


Global tree network for computing structures
patent-application, April 2004


Class network routing
patent-application, April 2004


Novel massively parallel supercomputer
patent-application, May 2004


Deterministic error recovery protocol
patent-application, April 2005


Method and apparatus for overhead reduction in an enhanced uplink in a wireless communication system
patent-application, December 2005


Method and apparatus for universal data exchange gateway
patent-application, November 2006