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Title: Combined guaranteed throughput and best effort network-on-chip

Abstract

A first packet-switched reservation request is received. Data associated with the first packet-switched reservation request is communicated through a first circuit-switched channel according to a best effort communication scheme. A second packet-switched reservation request is received. Data associated with the second packet-switched reservation request is communicated through a second circuit-switched channel according to a guaranteed throughput communication scheme.

Inventors:
; ; ; ;
Issue Date:
Research Org.:
Intel Corporation, Santa Clara, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1440780
Patent Number(s):
9979668
Application Number:
14/579,303
Assignee:
Intel Corporation (Santa Clara, CA)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
H - ELECTRICITY H04 - ELECTRIC COMMUNICATION TECHNIQUE H04L - TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
DOE Contract Number:  
6600738
Resource Type:
Patent
Resource Relation:
Patent File Date: 2014 Dec 22
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Chen, Gregory K., Anders, Mark A., Kaul, Himanshu, Krishnamurthy, Ram K., and Stillmaker, Aaron T. Combined guaranteed throughput and best effort network-on-chip. United States: N. p., 2018. Web.
Chen, Gregory K., Anders, Mark A., Kaul, Himanshu, Krishnamurthy, Ram K., & Stillmaker, Aaron T. Combined guaranteed throughput and best effort network-on-chip. United States.
Chen, Gregory K., Anders, Mark A., Kaul, Himanshu, Krishnamurthy, Ram K., and Stillmaker, Aaron T. Tue . "Combined guaranteed throughput and best effort network-on-chip". United States. https://www.osti.gov/servlets/purl/1440780.
@article{osti_1440780,
title = {Combined guaranteed throughput and best effort network-on-chip},
author = {Chen, Gregory K. and Anders, Mark A. and Kaul, Himanshu and Krishnamurthy, Ram K. and Stillmaker, Aaron T.},
abstractNote = {A first packet-switched reservation request is received. Data associated with the first packet-switched reservation request is communicated through a first circuit-switched channel according to a best effort communication scheme. A second packet-switched reservation request is received. Data associated with the second packet-switched reservation request is communicated through a second circuit-switched channel according to a guaranteed throughput communication scheme.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2018},
month = {5}
}

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Works referenced in this record:

16.1 A 340mV-to-0.9V 20.2Tb/s source-synchronous hybrid packet/circuit-switched 16×16 network-on-chip in 22nm tri-gate CMOS
conference, February 2014


Aelite: A flit-synchronous Network on Chip with composable and predictable services
conference, April 2009


Statistical Approach to Networks-on-Chip
journal, June 2010


A 1.2 TB/s on-chip ring interconnect for 45nm 8-core enterprise Xeon® processor
conference, February 2010


A 4.1Tb/s bisection-bandwidth 560Gb/s/W streaming circuit-switched 8×8 mesh network-on-chip in 45nm CMOS
conference, February 2010


Quality-of-service and error control techniques for network-on-chip architectures
conference, January 2004


A 2.9Tb/s 8W 64-core circuit-switched network-on-chip in 45nm CMOS
conference, September 2008