DOE Patents title logo U.S. Department of Energy
Office of Scientific and Technical Information

Title: Lateral vias for connections to buried microconductors

Abstract

The present invention relates to a lateral via to provide an electrical connection to a buried conductor. In one instance, the buried conductor is a through via that extends along a first dimension, and the lateral via extends along a second dimension that is generally orthogonal to the first dimension. In another instance, the second dimension is oblique to the first dimension. Components having such lateral vias, as well as methods for creating such lateral vias are described herein.

Inventors:
; ; ; ; ; ; ; ;
Issue Date:
Research Org.:
Sandia National Lab. (SNL-NM), Albuquerque, NM (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1440750
Patent Number(s):
9972565
Application Number:
15/175,312
Assignee:
National Technology & Engineering Solutions of Sandia, LLC (Albuquerque, NM)
Patent Classifications (CPCs):
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
DOE Contract Number:  
AC04-94AL85000
Resource Type:
Patent
Resource Relation:
Patent File Date: 2016 Jun 07
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING

Citation Formats

Adams, David P., Fishgrab, Kira L., Greth, Karl Douglas, Henry, Michael David, Stevens, Jeffrey, Hodges, V. Carter, Shul, Randy J., Goeke, Ronald S., and Grubbs, Robert K. Lateral vias for connections to buried microconductors. United States: N. p., 2018. Web.
Adams, David P., Fishgrab, Kira L., Greth, Karl Douglas, Henry, Michael David, Stevens, Jeffrey, Hodges, V. Carter, Shul, Randy J., Goeke, Ronald S., & Grubbs, Robert K. Lateral vias for connections to buried microconductors. United States.
Adams, David P., Fishgrab, Kira L., Greth, Karl Douglas, Henry, Michael David, Stevens, Jeffrey, Hodges, V. Carter, Shul, Randy J., Goeke, Ronald S., and Grubbs, Robert K. Tue . "Lateral vias for connections to buried microconductors". United States. https://www.osti.gov/servlets/purl/1440750.
@article{osti_1440750,
title = {Lateral vias for connections to buried microconductors},
author = {Adams, David P. and Fishgrab, Kira L. and Greth, Karl Douglas and Henry, Michael David and Stevens, Jeffrey and Hodges, V. Carter and Shul, Randy J. and Goeke, Ronald S. and Grubbs, Robert K.},
abstractNote = {The present invention relates to a lateral via to provide an electrical connection to a buried conductor. In one instance, the buried conductor is a through via that extends along a first dimension, and the lateral via extends along a second dimension that is generally orthogonal to the first dimension. In another instance, the second dimension is oblique to the first dimension. Components having such lateral vias, as well as methods for creating such lateral vias are described herein.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2018},
month = {5}
}

Works referenced in this record:

Method of laser drilling a substrate
patent, August 1990


Dry etching method for compound semiconductors
patent, April 1997


Method for dry etching of transition metals
patent, September 1998


Gallium nitride junction field-effect transistor
patent, February 1999


Apparatus and method for fabricating a microbattery
patent, August 2002


Surface micromachined structure fabrication methods for a fluid ejection device
patent, October 2002


Damascene fabrication of nonplanar microcoils
patent, June 2003


Method for laser drilling
patent, December 2003


Process for manufacture of semipermeable silicon nitride membranes
patent, December 2003


Microfabricated teeter-totter resonator
patent, November 2004


Method for chemical sensing using a microfabricated teeter-totter resonator
patent, November 2004


Method to fabricate multi-level silicon-based microstructures via use of an etching delay layer
patent, August 2005


ALD reactor and method with controlled wall temperature
patent, September 2005


Microelectromechanical safing and arming apparatus
patent, May 2006


Method to control artifacts of microstructural fabrication
patent, September 2006


Method of atomic layer deposition on plural semiconductor substrates simultaneously
patent, September 2006


Microelectromechanical acceleration-sensing apparatus
patent, December 2006


Microelectromechanical safing and arming apparatus
patent, June 2008


Method and apparatus for creating a topography at a surface
patent, November 2008


Nanostructure templating using low temperature atomic layer deposition
patent, December 2011


Die singulation method and package formed thereby
patent, August 2012


MEMS packaging with etching and thinning of lid wafer to form lids and expose device wafer bond pads
patent, December 2013


Method of intrinsic marking
patent, April 2014


Multiple-mode radiation detector
patent, August 2015


Tuning method for microresonators and microresonators made thereby
patent, December 2015


Efficient buried oxide layer interconnect scheme
patent, July 2016


Circuit carrier and production thereof
patent-application, March 2005


Electronic Device and Method of Manufacturing the Same
patent-application, April 2008


Atomic Layer Deposition of Platinum Thin Films
journal, May 2003


Reactive multilayers fabricated by vapor deposition: A critical review
journal, February 2015


Conformal Coating on Ultrahigh-Aspect-Ratio Nanopores of Anodic Alumina by Atomic Layer Deposition
journal, September 2003


Kinetics of the WF6 and Si2H6 surface reactions during tungsten atomic layer deposition
journal, May 2001


Parylene-membrane piezoresistive pressure sensors with XeF2-etched cavity
conference, October 2008


A Kinetic Model for Step Coverage by Atomic Layer Deposition in Narrow Holes or Trenches
journal, March 2003


Low-Temperature Al2O3 Atomic Layer Deposition
journal, February 2004


Feature scale modeling of pulsed plasma-enhanced chemical vapor deposition
journal, September 2014

  • Kelkar, Sanket S.; Wolden, Colin A.
  • Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena, Vol. 32, Issue 5, Article No. 052001
  • https://doi.org/10.1116/1.4891924

Modeling precursor diffusion and reaction of atomic layer deposition in porous structures
journal, January 2015

  • Keuter, Thomas; Menzler, Norbert Heribert; Mauer, Georg
  • Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films, Vol. 33, Issue 1, Article No. 01A104
  • https://doi.org/10.1116/1.4892385

Surface Loss in Ozone-Based Atomic Layer Deposition Processes
journal, May 2011


Comparative Study of Different Underfill Material on Flip Chip Ceramic Ball Grid Array Based on Accelerated Thermal Cycling
journal, January 2010


Pt–Al2O3 dual layer atomic layer deposition coating in high aspect ratio nanopores
journal, December 2012


Deep micro hole drilling in a silicon substrate using multi-bursts of nanosecond UV laser pulses
journal, December 2005


Formation of strong light-trapping nano- and microscale structures on a spherical metal surface by femtosecond laser filament
journal, May 2012