Global to push GA events into
skip to main content

Title: Near-memory data reorganization engine

A memory subsystem package is provided that has processing logic for data reorganization within the memory subsystem package. The processing logic is adapted to reorganize data stored within the memory subsystem package. In some embodiments, the memory subsystem package includes memory units, a memory interconnect, and a data reorganization engine ("DRE"). The data reorganization engine includes a stream interconnect and DRE units including a control processor and a load-store unit. The control processor is adapted to execute instructions to control a data reorganization. The load-store unit is adapted to process data move commands received from the control processor via the stream interconnect for loading data from a load memory address of a memory unit and storing data to a store memory address of a memory unit.
Inventors:
;
Issue Date:
OSTI Identifier:
1440026
Assignee:
Lawrence Livermore National Security, LLC (Livermore, CA) LLNL
Patent Number(s):
9,965,187
Application Number:
15/047,173
Contract Number:
AC52-07NA27344
Resource Relation:
Patent File Date: 2016 Feb 18
Research Org:
Lawrence Livermore National Lab. (LLNL), Livermore, CA (United States)
Sponsoring Org:
USDOE
Country of Publication:
United States
Language:
English

Similar records in DOepatents and OSTI.GOV collections: