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Title: Near-memory data reorganization engine

Abstract

A memory subsystem package is provided that has processing logic for data reorganization within the memory subsystem package. The processing logic is adapted to reorganize data stored within the memory subsystem package. In some embodiments, the memory subsystem package includes memory units, a memory interconnect, and a data reorganization engine ("DRE"). The data reorganization engine includes a stream interconnect and DRE units including a control processor and a load-store unit. The control processor is adapted to execute instructions to control a data reorganization. The load-store unit is adapted to process data move commands received from the control processor via the stream interconnect for loading data from a load memory address of a memory unit and storing data to a store memory address of a memory unit.

Inventors:
;
Issue Date:
Research Org.:
Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1440026
Patent Number(s):
9965187
Application Number:
15/047,173
Assignee:
Lawrence Livermore National Security, LLC (Livermore, CA)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
AC52-07NA27344
Resource Type:
Patent
Resource Relation:
Patent File Date: 2016 Feb 18
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Gokhale, Maya, and Lloyd, G. Scott. Near-memory data reorganization engine. United States: N. p., 2018. Web.
Gokhale, Maya, & Lloyd, G. Scott. Near-memory data reorganization engine. United States.
Gokhale, Maya, and Lloyd, G. Scott. Tue . "Near-memory data reorganization engine". United States. https://www.osti.gov/servlets/purl/1440026.
@article{osti_1440026,
title = {Near-memory data reorganization engine},
author = {Gokhale, Maya and Lloyd, G. Scott},
abstractNote = {A memory subsystem package is provided that has processing logic for data reorganization within the memory subsystem package. The processing logic is adapted to reorganize data stored within the memory subsystem package. In some embodiments, the memory subsystem package includes memory units, a memory interconnect, and a data reorganization engine ("DRE"). The data reorganization engine includes a stream interconnect and DRE units including a control processor and a load-store unit. The control processor is adapted to execute instructions to control a data reorganization. The load-store unit is adapted to process data move commands received from the control processor via the stream interconnect for loading data from a load memory address of a memory unit and storing data to a store memory address of a memory unit.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2018},
month = {5}
}

Works referenced in this record:

Data Processing Apparatus, Data Processing Method, and Computer Product
patent-application, August 2014


System and Method for System on a Chip
patent-application, April 2016


Data Streaming Unit and Method for Operating the Data Streaming Unit
patent-application, June 2017


Memory Synchronization Filter
patent-application, June 2017