Near-chip compliant layer for reducing perimeter stress during assembly process
Abstract
A heat source (single semiconductor chip or group of closely spaced semiconductor chips of similar height) is provided on a first side of a substrate, which substrate has on said first side a support member comprising a compressible material. A heat removal component, oriented at an angle to said heat source, is brought into proximity of said heat source such that said heat removal component contacts said support member prior to contacting said heat source. Said heat removal component is assembled to said heat source such that said support member at least partially absorbs global inequality of force that would otherwise be applied to said heat source, absent said support member comprising said compressible material.
- Inventors:
- Issue Date:
- Research Org.:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1429081
- Patent Number(s):
- 9922900
- Application Number:
- 15/412,379
- Assignee:
- International Business Machines Corporation, Armonk, NY
- Patent Classifications (CPCs):
-
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
- DOE Contract Number:
- B604142
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2017 Jan 23
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING
Citation Formats
Schultz, Mark D., Takken, Todd E., Tian, Shurong, and Yao, Yuan. Near-chip compliant layer for reducing perimeter stress during assembly process. United States: N. p., 2018.
Web.
Schultz, Mark D., Takken, Todd E., Tian, Shurong, & Yao, Yuan. Near-chip compliant layer for reducing perimeter stress during assembly process. United States.
Schultz, Mark D., Takken, Todd E., Tian, Shurong, and Yao, Yuan. Tue .
"Near-chip compliant layer for reducing perimeter stress during assembly process". United States. https://www.osti.gov/servlets/purl/1429081.
@article{osti_1429081,
title = {Near-chip compliant layer for reducing perimeter stress during assembly process},
author = {Schultz, Mark D. and Takken, Todd E. and Tian, Shurong and Yao, Yuan},
abstractNote = {A heat source (single semiconductor chip or group of closely spaced semiconductor chips of similar height) is provided on a first side of a substrate, which substrate has on said first side a support member comprising a compressible material. A heat removal component, oriented at an angle to said heat source, is brought into proximity of said heat source such that said heat removal component contacts said support member prior to contacting said heat source. Said heat removal component is assembled to said heat source such that said support member at least partially absorbs global inequality of force that would otherwise be applied to said heat source, absent said support member comprising said compressible material.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2018},
month = {3}
}
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