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Title: Apparatus and method for implementing power saving techniques when processing floating point values

An apparatus and method are described for reducing power when reading and writing graphics data. For example, one embodiment of an apparatus comprises: a graphics processor unit (GPU) to process graphics data including floating point data; a set of registers, at least one of the registers of the set partitioned to store the floating point data; and encode/decode logic to reduce a number of binary 1 values being read from the at least one register by causing a specified set of bit positions within the floating point data to be read out as 0s rather than 1s.
Inventors:
;
Issue Date:
OSTI Identifier:
1397247
Assignee:
Intel Corporation OSTI
Patent Number(s):
9,779,465
Application Number:
14/581,600
Contract Number:
B600738
Resource Relation:
Patent File Date: 2014 Dec 23
Research Org:
Intel Corporation, Santa Clara, CA (United States)
Sponsoring Org:
USDOE
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Works referenced in this record: