Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses
Abstract
In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.
- Inventors:
- Issue Date:
- Research Org.:
- GLOBALFOUNDRIES INC. Grand Cayman, KY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1375213
- Patent Number(s):
- 9,733,831
- Application Number:
- 14/320,841
- Assignee:
- GLOBALFOUNDRIES INC.
- DOE Contract Number:
- B554331
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2014 Jul 01
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Ohmacht, Martin. Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses. United States: N. p., 2017.
Web.
Ohmacht, Martin. Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses. United States.
Ohmacht, Martin. Tue .
"Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses". United States. https://www.osti.gov/servlets/purl/1375213.
@article{osti_1375213,
title = {Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses},
author = {Ohmacht, Martin},
abstractNote = {In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2017},
month = {8}
}
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