Method to pattern <10 micrometer conducting and passivating features on 3D substrates for implantable devices

Tolosa, Vanessa; Pannu, Satinderpall S.; Sheth, Heeral; Tooker, Angela C.; Shah, Kedar G.

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Title: Method to pattern <10 micrometer conducting and passivating features on 3D substrates for implantable devices

Abstract

An implantable device has a cylindrical base, at least one electrode on the cylindrical base, at least one electrically conducting lead on the cylindrical base connected to the electrode wherein the electrically conducting lead has a feature size of <10 micrometers. A protective coating on the cylindrical base covers the at least one electrically conducting lead.

Inventors:: Tolosa, Vanessa; Pannu, Satinderpall S.; Sheth, Heeral; Tooker, Angela C.; Shah, Kedar G.

Issue Date:: 2017-07-04

Research Org.:: Lawrence Livermore National Laboratory (LLNL), Livermore, CA (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1368352

Patent Number(s):: 9694190

Application Number:: 14/213,733

Assignee:: Lawrence Livermore National Security, LLC

Patent Classifications (CPCs):: A - HUMAN NECESSITIES A61 - MEDICAL OR VETERINARY SCIENCE A61N - ELECTROTHERAPY

H - ELECTRICITY H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR H05K - PRINTED CIRCUITS

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A - HUMAN NECESSITIES A61 - MEDICAL OR VETERINARY SCIENCE A61N - ELECTROTHERAPY
A61N1/05 - for implantation or insertion into the body, e.g. heart electrode
A61N1/3756 - {Casings with electrodes thereon, e.g. leadless stimulators}

H - ELECTRICITY H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR H05K - PRINTED CIRCUITS
H05K3/02 - in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
H05K3/28 - Applying non-metallic protective coatings {

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DOE Contract Number:: AC52-07NA27344

Resource Type:: Patent

Resource Relation:: Patent File Date: 2014 Mar 14

Country of Publication:: United States

Language:: English

Subject:: 42 ENGINEERING

Citation Formats


                    Tolosa, Vanessa, Pannu, Satinderpall S., Sheth, Heeral, Tooker, Angela C., and Shah, Kedar G. Method to pattern <10 micrometer conducting and passivating features on 3D substrates for implantable devices.  United States: N. p., 2017. 
        Web.

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                    Tolosa, Vanessa, Pannu, Satinderpall S., Sheth, Heeral, Tooker, Angela C., & Shah, Kedar G. Method to pattern <10 micrometer conducting and passivating features on 3D substrates for implantable devices.  United States.

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                    Tolosa, Vanessa, Pannu, Satinderpall S., Sheth, Heeral, Tooker, Angela C., and Shah, Kedar G. Tue .  
        "Method to pattern <10 micrometer conducting and passivating features on 3D substrates for implantable devices".  United States.  https://www.osti.gov/servlets/purl/1368352.

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@article{osti_1368352,

  title        = {Method to pattern <10 micrometer conducting and passivating features on 3D substrates for implantable devices},

  author       = {Tolosa, Vanessa and Pannu, Satinderpall S. and Sheth, Heeral and Tooker, Angela C. and Shah, Kedar G.},

  abstractNote = {An implantable device has a cylindrical base, at least one electrode on the cylindrical base, at least one electrically conducting lead on the cylindrical base connected to the electrode wherein the electrically conducting lead has a feature size of <10 micrometers. A protective coating on the cylindrical base covers the at least one electrically conducting lead.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2017},

  month        = {7}

}

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Title: Method to pattern <10 micrometer conducting and passivating features on 3D substrates for implantable devices

Abstract

Citation Formats

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Occipital nerve stimulation to treat headaches and other conditions
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