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Title: High-density, fail-in-place switches for computer and data networks

Abstract

A structure for a network switch. The network switch may include a plurality of spine chips arranged on a plurality of spine cards, where one or more spine chips are located on each spine card; and a plurality of leaf chips arranged on a plurality of leaf cards, wherein one or more leaf chips are located on each leaf card, where each spine card is connected to every leaf chip and the plurality of spine chips are surrounded on at least two sides by leaf cards.

Inventors:
; ; ; ; ;
Issue Date:
Research Org.:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1353058
Patent Number(s):
9,634,959
Application Number:
14/548,345
Assignee:
International Business Machines Corporation
DOE Contract Number:  
B601996
Resource Type:
Patent
Resource Relation:
Patent File Date: 2014 Nov 20
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Coteus, Paul W., Doany, Fuad E., Hall, Shawn A., Schultz, Mark D., Takken, Todd E., and Tian, Shurong. High-density, fail-in-place switches for computer and data networks. United States: N. p., 2017. Web.
Coteus, Paul W., Doany, Fuad E., Hall, Shawn A., Schultz, Mark D., Takken, Todd E., & Tian, Shurong. High-density, fail-in-place switches for computer and data networks. United States.
Coteus, Paul W., Doany, Fuad E., Hall, Shawn A., Schultz, Mark D., Takken, Todd E., and Tian, Shurong. Tue . "High-density, fail-in-place switches for computer and data networks". United States. https://www.osti.gov/servlets/purl/1353058.
@article{osti_1353058,
title = {High-density, fail-in-place switches for computer and data networks},
author = {Coteus, Paul W. and Doany, Fuad E. and Hall, Shawn A. and Schultz, Mark D. and Takken, Todd E. and Tian, Shurong},
abstractNote = {A structure for a network switch. The network switch may include a plurality of spine chips arranged on a plurality of spine cards, where one or more spine chips are located on each spine card; and a plurality of leaf chips arranged on a plurality of leaf cards, wherein one or more leaf chips are located on each leaf card, where each spine card is connected to every leaf chip and the plurality of spine chips are surrounded on at least two sides by leaf cards.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2017},
month = {4}
}

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Works referenced in this record:

Multi-homed Fat-Tree Routing with InfiniBand
conference, February 2014

  • Reinemo, Sven-Arne; Bogdanski, Bartosz; Johnsen, Bjorn Dag
  • 2014 22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing
  • DOI: 10.1109/PDP.2014.22