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Title: Matrix multiplication operations using pair-wise load and splat operations

Mechanisms for performing a matrix multiplication operation are provided. A vector load operation is performed to load a first vector operand of the matrix multiplication operation to a first target vector register. A pair-wise load and splat operation is performed to load a pair of scalar values of a second vector operand and replicate the pair of scalar values within a second target vector register. An operation is performed on elements of the first target vector register and elements of the second target vector register to generate a partial product of the matrix multiplication operation. The partial product is accumulated with other partial products and a resulting accumulated partial product is stored. This operation may be repeated for a second pair of scalar values of the second vector operand.
Inventors:
; ; ;
Issue Date:
OSTI Identifier:
1347566
Assignee:
International Business Machines Corporation OSTI
Patent Number(s):
9,600,281
Application Number:
12/834,464
Contract Number:
B554331
Resource Relation:
Patent File Date: 2010 Jul 12
Research Org:
International Business Machines Corporation, Armonk, NY (United States)
Sponsoring Org:
USDOE
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Works referenced in this record:

Adaptive Strassen and ATLAS's DGEMM: a fast square-matrix multiply for modern high-performance systems
conference, January 2005
  • D'Alberto, P.; Nicolau, A.
  • Eighth International Conference on High-Performance Computing in Asia-Pacific Region (HPCASIA'05)
  • DOI: 10.1109/HPCASIA.2005.18

High performance software on Intel Pentium Pro processors or Micro-Ops to TeraFLOPS
conference, January 1997
  • Greer, Bruce; Henry, Greg
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  • DOI: 10.1145/509593.509639