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Title: Near-chip compliant layer for reducing perimeter stress during assembly process

Abstract

A heat source (single semiconductor chip or group of closely spaced semiconductor chips of similar height) is provided on a first side of a substrate, which substrate has on said first side a support member comprising a compressible material. A heat removal component, oriented at an angle to said heat source, is brought into proximity of said heat source such that said heat removal component contacts said support member prior to contacting said heat source. Said heat removal component is assembled to said heat source such that said support member at least partially absorbs global inequality of force that would otherwise be applied to said heat source, absent said support member comprising said compressible material.

Inventors:
; ; ;
Issue Date:
Research Org.:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1343745
Patent Number(s):
9570373
Application Number:
14/963,466
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Classifications (CPCs):
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
DOE Contract Number:  
B604142
Resource Type:
Patent
Resource Relation:
Patent File Date: 2015 Dec 09
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING; 36 MATERIALS SCIENCE

Citation Formats

Schultz, Mark D., Takken, Todd E., Tian, Shurong, and Yao, Yuan. Near-chip compliant layer for reducing perimeter stress during assembly process. United States: N. p., 2017. Web.
Schultz, Mark D., Takken, Todd E., Tian, Shurong, & Yao, Yuan. Near-chip compliant layer for reducing perimeter stress during assembly process. United States.
Schultz, Mark D., Takken, Todd E., Tian, Shurong, and Yao, Yuan. Tue . "Near-chip compliant layer for reducing perimeter stress during assembly process". United States. https://www.osti.gov/servlets/purl/1343745.
@article{osti_1343745,
title = {Near-chip compliant layer for reducing perimeter stress during assembly process},
author = {Schultz, Mark D. and Takken, Todd E. and Tian, Shurong and Yao, Yuan},
abstractNote = {A heat source (single semiconductor chip or group of closely spaced semiconductor chips of similar height) is provided on a first side of a substrate, which substrate has on said first side a support member comprising a compressible material. A heat removal component, oriented at an angle to said heat source, is brought into proximity of said heat source such that said heat removal component contacts said support member prior to contacting said heat source. Said heat removal component is assembled to said heat source such that said support member at least partially absorbs global inequality of force that would otherwise be applied to said heat source, absent said support member comprising said compressible material.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2017},
month = {2}
}

Works referenced in this record:

Multi-chip socket
patent, July 2014


Local reduction of compliant thermally conductive material layer thickness on chips
patent-application, June 2005


Semiconductor Package with a Stiffening Member Supporting a Thermal Heat Spreader
patent-application, January 2011


Microelectronic assemblies having compliant layers
patent, January 2011


Heat spreader for a multi-chip package
patent-application, June 2008


Lid Design for Reliability Enhancement in Flip Chip Package
patent-application, July 2012


Compliant Heat Spreader for Flip Chip Packaging
patent-application, April 2012


Circuit arrangement with a cooling member
patent, March 1994


Adjustable thickness thermal interposer and electronic package utilizing same
patent, December 2009


Matrix Lid Heatspreader for Flip Chip Package
patent-application, January 2016


Thermal Pillow
patent-application, September 2008


Microelectronic assemblies having compliant layers
patent, December 2012


Liquid DIMM Cooling Device
patent-application, January 2013