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Title: Processor register error correction management

Abstract

Processor register protection management is disclosed. In embodiments, a method of processor register protection management can include determining a sensitive logical register for executable code generated by a compiler, generating an error-correction table identifying the sensitive logical register, and storing the error-correction table in a memory accessible by a processor. The processor can be configured to generate a duplicate register of the sensitive logical register identified by the error-correction table.

Inventors:
; ;
Issue Date:
Research Org.:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1337630
Patent Number(s):
9529653
Application Number:
14/510,350
Assignee:
International Business Machines Corporation (Armonk, NY
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
B599858
Resource Type:
Patent
Resource Relation:
Patent File Date: 2014 Oct 09
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Bose, Pradip, Cher, Chen-Yong, and Gupta, Meeta S. Processor register error correction management. United States: N. p., 2016. Web.
Bose, Pradip, Cher, Chen-Yong, & Gupta, Meeta S. Processor register error correction management. United States.
Bose, Pradip, Cher, Chen-Yong, and Gupta, Meeta S. Tue . "Processor register error correction management". United States. https://www.osti.gov/servlets/purl/1337630.
@article{osti_1337630,
title = {Processor register error correction management},
author = {Bose, Pradip and Cher, Chen-Yong and Gupta, Meeta S.},
abstractNote = {Processor register protection management is disclosed. In embodiments, a method of processor register protection management can include determining a sensitive logical register for executable code generated by a compiler, generating an error-correction table identifying the sensitive logical register, and storing the error-correction table in a memory accessible by a processor. The processor can be configured to generate a duplicate register of the sensitive logical register identified by the error-correction table.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2016},
month = {12}
}

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Works referenced in this record:

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