Multiprocessor system with multiple concurrent modes of execution

Title: Multiprocessor system with multiple concurrent modes of execution

Abstract

A multiprocessor system supports multiple concurrent modes of speculative execution. Speculation identification numbers (IDs) are allocated to speculative threads from a pool of available numbers. The pool is divided into domains, with each domain being assigned to a mode of speculation. Modes of speculation include TM, TLS, and rollback. Allocation of the IDs is carried out with respect to a central state table and using hardware pointers. The IDs are used for writing different versions of speculative results in different ways of a set in a cache memory.

Inventors:: Ahn, Daniel; Ceze, Luis H.; Chen, Dong Chen; Gara, Alan; Heidelberger, Philip; Ohmacht, Martin

Issue Date:: 2016-11-22

Research Org.:: International Business Machines Corp., Armonk, NY (United States)

Sponsoring Org.:: USDOE

OSTI Identifier:: 1333218

Patent Number(s):: 9501333

Application Number:: 14/143,783

Assignee:: International Business Machines Corporation (Armonk, NY)

Patent Classifications (CPCs):: G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING

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G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
G06F9/524 - {Deadlock detection or avoidance}
G06F12/08 - in hierarchically structured memory systems, e.g. virtual memory systems

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DOE Contract Number:: B554331

Resource Type:: Patent

Resource Relation:: Patent File Date: 2013 Dec 30

Country of Publication:: United States

Language:: English

Subject:: 97 MATHEMATICS AND COMPUTING

Citation Formats


                    Ahn, Daniel, Ceze, Luis H., Chen, Dong Chen, Gara, Alan, Heidelberger, Philip, and Ohmacht, Martin. Multiprocessor system with multiple concurrent modes of execution.  United States: N. p., 2016. 
        Web.

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                    Ahn, Daniel, Ceze, Luis H., Chen, Dong Chen, Gara, Alan, Heidelberger, Philip, & Ohmacht, Martin. Multiprocessor system with multiple concurrent modes of execution.  United States.

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                    Ahn, Daniel, Ceze, Luis H., Chen, Dong Chen, Gara, Alan, Heidelberger, Philip, and Ohmacht, Martin. Tue .  
        "Multiprocessor system with multiple concurrent modes of execution".  United States.  https://www.osti.gov/servlets/purl/1333218.

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@article{osti_1333218,

  title        = {Multiprocessor system with multiple concurrent modes of execution},

  author       = {Ahn, Daniel and Ceze, Luis H. and Chen, Dong Chen and Gara, Alan and Heidelberger, Philip and Ohmacht, Martin},

  abstractNote = {A multiprocessor system supports multiple concurrent modes of speculative execution. Speculation identification numbers (IDs) are allocated to speculative threads from a pool of available numbers. The pool is divided into domains, with each domain being assigned to a mode of speculation. Modes of speculation include TM, TLS, and rollback. Allocation of the IDs is carried out with respect to a central state table and using hardware pointers. The IDs are used for writing different versions of speculative results in different ways of a set in a cache memory.},

  doi          = {},

  journal      = {},
number       = ,

  volume       = ,

  place        = {United States},

  year         = {2016},

  month        = {11}

}

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Works referenced in this record:

Speculative synchronization: applying thread-level speculation to explicitly parallel applications
conference, January 2002

Martínez, José F.; Torrellas, Josep
Tenth international conference on architectural support for programming languages and operating systems on Proceedings of the 10th international conference on architectural support for programming languages and operating systems (ASPLOS-X) - ASPLOS '02
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Wait-free synchronization
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Herlihy, Maurice
ACM Transactions on Programming Languages and Systems, Vol. 13, Issue 1
https://doi.org/10.1145/114005.102808

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Title: Multiprocessor system with multiple concurrent modes of execution

Abstract

Citation Formats

Speculative synchronization: applying thread-level speculation to explicitly parallel applications conference, January 2002

A quantitative assessment of thread-level speculation techniques conference, January 2000

Bulk Disambiguation of Speculative Threads in Multiprocessors conference, January 2006

Tasking with out-of-order spawn in TLS chip multiprocessors: microarchitecture and compilation conference, January 2005

Active memory operations conference, January 2007

Fast synchronization on shared-memory multiprocessors: An architectural approach journal, October 2005

Scatter-Add in Data Parallel Architectures conference, January 2005

Algorithms for scalable synchronization on shared-memory multiprocessors journal, February 1991

Nonblocking Algorithms and Preemption-Safe Locking on Multiprogrammed Shared Memory Multiprocessors journal, May 1998

A fetch-and-op implementation for parallel computers journal, May 1988

Wait-free synchronization journal, January 1991

Speculative synchronization: applying thread-level speculation to explicitly parallel applications
conference, January 2002

A quantitative assessment of thread-level speculation techniques
conference, January 2000

Bulk Disambiguation of Speculative Threads in Multiprocessors
conference, January 2006

Tasking with out-of-order spawn in TLS chip multiprocessors: microarchitecture and compilation
conference, January 2005

Active memory operations
conference, January 2007

Fast synchronization on shared-memory multiprocessors: An architectural approach
journal, October 2005

Scatter-Add in Data Parallel Architectures
conference, January 2005

Algorithms for scalable synchronization on shared-memory multiprocessors
journal, February 1991

Nonblocking Algorithms and Preemption-Safe Locking on Multiprogrammed Shared Memory Multiprocessors
journal, May 1998

A fetch-and-op implementation for parallel computers
journal, May 1988

Wait-free synchronization
journal, January 1991