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Title: High speed imager test station

A test station enables the performance of a solid state imager (herein called a focal plane array or FPA) to be determined at high image frame rates. A programmable waveform generator is adapted to generate clock pulses at determinable rates for clock light-induced charges from a FPA. The FPA is mounted on an imager header board for placing the imager in operable proximity to level shifters for receiving the clock pulses and outputting pulses effective to clock charge from the pixels forming the FPA. Each of the clock level shifters is driven by leading and trailing edge portions of the clock pulses to reduce power dissipation in the FPA. Analog circuits receive output charge pulses clocked from the FPA pixels. The analog circuits condition the charge pulses to cancel noise in the pulses and to determine and hold a peak value of the charge for digitizing. A high speed digitizer receives the peak signal value and outputs a digital representation of each one of the charge pulses. A video system then displays an image associated with the digital representation of the output charge pulses clocked from the FPA. In one embodiment, the FPA image is formatted to a standard videomore » format for display on conventional video equipment. 12 figs.« less
Inventors:
; ;
Issue Date:
OSTI Identifier:
131910
Assignee:
Univ. of California, Office of Technology Transfer, Alameda, CA (United States) PTO; SCA: 440600; PA: EDB-95:157890; SN: 95001485785
Patent Number(s):
US 5,467,128/A/
Application Number:
PAN: 8-183,544
Contract Number:
W-7405-ENG-36
Resource Relation:
Other Information: PBD: 14 Nov 1995
Research Org:
University of California
Country of Publication:
United States
Language:
English
Subject:
44 INSTRUMENTATION, INCLUDING NUCLEAR AND PARTICLE DETECTORS; IMAGE TUBES; TEST FACILITIES; PERFORMANCE TESTING; DESIGN; ANALOG SYSTEMS; DIGITIZERS; IMAGE PROCESSING; IMAGES

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