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Title: Comparator circuits with local ramp buffering for a column-parallel single slope ADC

Abstract

A comparator circuit suitable for use in a column-parallel single-slope analog-to-digital converter comprises a comparator, an input voltage sampling switch, a sampling capacitor arranged to store a voltage which varies with an input voltage when the sampling switch is closed, and a local ramp buffer arranged to buffer a global voltage ramp applied at an input. The comparator circuit is arranged such that its output toggles when the buffered global voltage ramp exceeds the stored voltage. Both DC- and AC-coupled comparator embodiments are disclosed.

Inventors:
Issue Date:
Research Org.:
Sandia National Laboratories (SNL), Albuquerque, NM, and Livermore, CA (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1248813
Patent Number(s):
9,325,335
Application Number:
14/523,179
Assignee:
TELEDYNE SCIENTIFIC & IMAGING, LLC (Thousand Oaks, CA)
DOE Contract Number:  
AC04-94AL85000
Resource Type:
Patent
Resource Relation:
Patent File Date: 2014 Oct 24
Country of Publication:
United States
Language:
English
Subject:
42 ENGINEERING; 71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS

Citation Formats

Milkov, Mihail M. Comparator circuits with local ramp buffering for a column-parallel single slope ADC. United States: N. p., 2016. Web.
Milkov, Mihail M. Comparator circuits with local ramp buffering for a column-parallel single slope ADC. United States.
Milkov, Mihail M. Tue . "Comparator circuits with local ramp buffering for a column-parallel single slope ADC". United States. https://www.osti.gov/servlets/purl/1248813.
@article{osti_1248813,
title = {Comparator circuits with local ramp buffering for a column-parallel single slope ADC},
author = {Milkov, Mihail M.},
abstractNote = {A comparator circuit suitable for use in a column-parallel single-slope analog-to-digital converter comprises a comparator, an input voltage sampling switch, a sampling capacitor arranged to store a voltage which varies with an input voltage when the sampling switch is closed, and a local ramp buffer arranged to buffer a global voltage ramp applied at an input. The comparator circuit is arranged such that its output toggles when the buffered global voltage ramp exceeds the stored voltage. Both DC- and AC-coupled comparator embodiments are disclosed.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2016},
month = {4}
}

Patent:

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