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Title: Method and apparatus for faulty memory utilization

Abstract

A method for faulty memory utilization in a memory system includes: obtaining information regarding memory health status of at least one memory page in the memory system; determining an error tolerance of the memory page when the information regarding memory health status indicates that a failure is predicted to occur in an area of the memory system affecting the memory page; initiating a migration of data stored in the memory page when it is determined that the data stored in the memory page is non-error-tolerant; notifying at least one application regarding a predicted operating system failure and/or a predicted application failure when it is determined that data stored in the memory page is non-error-tolerant and cannot be migrated; and notifying at least one application regarding the memory failure predicted to occur when it is determined that data stored in the memory page is error-tolerant.

Inventors:
; ; ; ;
Issue Date:
Research Org.:
International Business Machines Corp., Armonk, NY (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1247994
Patent Number(s):
9317350
Application Number:
14/022,171
Assignee:
International Business Machines Corporation (Armonk, NY)
Patent Classifications (CPCs):
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
DOE Contract Number:  
B599858
Resource Type:
Patent
Resource Relation:
Patent File Date: 2013 Sep 09
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Cher, Chen-Yong, Andrade Costa, Carlos H., Park, Yoonho, Rosenburg, Bryan S., and Ryu, Kyung D.. Method and apparatus for faulty memory utilization. United States: N. p., 2016. Web.
Cher, Chen-Yong, Andrade Costa, Carlos H., Park, Yoonho, Rosenburg, Bryan S., & Ryu, Kyung D.. Method and apparatus for faulty memory utilization. United States.
Cher, Chen-Yong, Andrade Costa, Carlos H., Park, Yoonho, Rosenburg, Bryan S., and Ryu, Kyung D.. Tue . "Method and apparatus for faulty memory utilization". United States. https://www.osti.gov/servlets/purl/1247994.
@article{osti_1247994,
title = {Method and apparatus for faulty memory utilization},
author = {Cher, Chen-Yong and Andrade Costa, Carlos H. and Park, Yoonho and Rosenburg, Bryan S. and Ryu, Kyung D.},
abstractNote = {A method for faulty memory utilization in a memory system includes: obtaining information regarding memory health status of at least one memory page in the memory system; determining an error tolerance of the memory page when the information regarding memory health status indicates that a failure is predicted to occur in an area of the memory system affecting the memory page; initiating a migration of data stored in the memory page when it is determined that the data stored in the memory page is non-error-tolerant; notifying at least one application regarding a predicted operating system failure and/or a predicted application failure when it is determined that data stored in the memory page is non-error-tolerant and cannot be migrated; and notifying at least one application regarding the memory failure predicted to occur when it is determined that data stored in the memory page is error-tolerant.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2016},
month = {4}
}

Works referenced in this record:

Proactive process-level live migration and back migration in HPC environments
journal, February 2012


Proactive Fault Tolerance Using Preemptive Migration
conference, February 2009

  • Engelmann, Christian; Vallee, Geoffroy R.; Naughton, Thomas
  • 2009 17th Euromicro International Conference on Parallel, Distributed and Network-based Processing
  • https://doi.org/10.1109/PDP.2009.31

Improving the live migration process of large enterprise applications
conference, January 2009


Memory management method for coupled memory multiprocessor systems
patent, August 1993


Adaptive memory management method for coupled memory multiprocessor systems
patent, December 1993


Temperature dependent disc drive parametric configuration
patent, June 2000


System and method for predicting storage device failures
patent, October 2002


Method and apparatus for storage unit replacement according to array priority
patent, May 2003


Method and apparatus for storage unit replacement in non-redundant array
patent, July 2003


System and method for predicting component failures in large systems
patent, September 2006


Deterministic preventive recovery from a predicted failure in a distributed storage system
patent, April 2009


Systems and methods for predictive failure management
patent, June 2010


Use of operational configuration parameters to predict system failures
patent, January 2011


Methods and mechanisms for proactive memory management
patent, October 2011


System and methodology for parallel stream processing
patent, November 2011


Controlled automatic healing of data-center services
patent, January 2013