Method and apparatus for sub-hysteresis discrimination
Abstract
Embodiments of comparator circuits are disclosed. A comparator circuit may include a differential input circuit, an output circuit, a positive feedback circuit operably coupled between the differential input circuit and the output circuit, and a hysteresis control circuit operably coupled with the positive feedback circuit. The hysteresis control circuit includes a switching device and a transistor. The comparator circuit provides sub-hysteresis discrimination and high speed discrimination.
- Inventors:
- Issue Date:
- Research Org.:
- Brookhaven National Laboratory (BNL), Upton, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1234203
- Patent Number(s):
- 9225325
- Application Number:
- 14/471,617
- Assignee:
- Brookhaven Science Associates, LLC
- Patent Classifications (CPCs):
-
H - ELECTRICITY H03 - BASIC ELECTRONIC CIRCUITRY H03K - PULSE TECHNIQUE
- DOE Contract Number:
- AC02-98CH10886
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2014 Aug 28
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS
Citation Formats
De Geronimo, Gianluigi. Method and apparatus for sub-hysteresis discrimination. United States: N. p., 2015.
Web.
De Geronimo, Gianluigi. Method and apparatus for sub-hysteresis discrimination. United States.
De Geronimo, Gianluigi. Tue .
"Method and apparatus for sub-hysteresis discrimination". United States. https://www.osti.gov/servlets/purl/1234203.
@article{osti_1234203,
title = {Method and apparatus for sub-hysteresis discrimination},
author = {De Geronimo, Gianluigi},
abstractNote = {Embodiments of comparator circuits are disclosed. A comparator circuit may include a differential input circuit, an output circuit, a positive feedback circuit operably coupled between the differential input circuit and the output circuit, and a hysteresis control circuit operably coupled with the positive feedback circuit. The hysteresis control circuit includes a switching device and a transistor. The comparator circuit provides sub-hysteresis discrimination and high speed discrimination.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Dec 29 00:00:00 EST 2015},
month = {Tue Dec 29 00:00:00 EST 2015}
}
Save to My Library
You must Sign In or Create an Account in order to save documents to your library.
Works referenced in this record:
Precision CMOS comparator with hysteresis
patent, July 1990
- Laude, David P.
- US Patent Document 4,940,907
Comparator circuit with variable hysteresis characteristic
patent, November 1992
- Matsubara, Kunihiro; Shimizu, Katsuya
- US Patent Document 5,166,550
Comparator circuit with hysteresis
patent, August 1997
- Marlow, C. Allen; Danstrom, Eric J.
- US Patent Document 5,656,957
Comparator circuit with built-in hysteresis offset
patent, March 2001
- Callahan, Jr., Michael J.
- US Patent Document 6,208,187
Voltage monitor circuit with adjustable hysteresis using a single comparator
patent, October 2001
- Yee, Philip W.
- US Patent Document 6,304,088
Fast-switching comparator with hysteresis
patent, March 2002
- Bray, Derek
- US Patent Document 6,362,467
Programmable logic integrated circuit devices with low voltage differential signaling capabilities
patent, March 2003
- Nguyen, Khai; Wang, Xiaobao; Kim, In Whan
- US Patent Document 6,535,031
Simplified comparator with digitally controllable hysteresis and bandwidth
patent, January 2006
- Cheng, Yi
- US Patent Document 6,982,582
Leakage balancing transistor for jitter reduction in CML to CMOS converters
patent, March 2007
- Rowley, Matthew D.
- US Patent Document 7,187,207
Comparator with amplitude and time hysteresis
patent, May 2010
- Xu, Chao
- US Patent Document 7,714,620
VMM1—An ASIC for Micropattern Detectors
journal, June 2013
- De Geronimo, G.; Fried, J.
- IEEE Transactions on Nuclear Science, Vol. 60, Issue 3