Hardware enabled performance counters with support for operating system context switching
Abstract
A device for supporting hardware enabled performance counters with support for context switching include a plurality of performance counters operable to collect information associated with one or more computer system related activities, a first register operable to store a memory address, a second register operable to store a mode indication, and a state machine operable to read the second register and cause the plurality of performance counters to copy the information to memory area indicated by the memory address based on the mode indication.
- Inventors:
- Issue Date:
- Research Org.:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1187936
- Patent Number(s):
- 9,069,891
- Application Number:
- 12/684,190
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- DOE Contract Number:
- B554331
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2010 Jan 08
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Salapura, Valentina, and Wisniewski, Robert W. Hardware enabled performance counters with support for operating system context switching. United States: N. p., 2015.
Web.
Salapura, Valentina, & Wisniewski, Robert W. Hardware enabled performance counters with support for operating system context switching. United States.
Salapura, Valentina, and Wisniewski, Robert W. Tue .
"Hardware enabled performance counters with support for operating system context switching". United States. https://www.osti.gov/servlets/purl/1187936.
@article{osti_1187936,
title = {Hardware enabled performance counters with support for operating system context switching},
author = {Salapura, Valentina and Wisniewski, Robert W.},
abstractNote = {A device for supporting hardware enabled performance counters with support for context switching include a plurality of performance counters operable to collect information associated with one or more computer system related activities, a first register operable to store a memory address, a second register operable to store a mode indication, and a state machine operable to read the second register and cause the plurality of performance counters to copy the information to memory area indicated by the memory address based on the mode indication.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2015},
month = {6}
}
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