Packaging of solid state devices
Abstract
A package for one or more solid state devices in a single module that allows for operation at high voltage, high current, or both high voltage and high current. Low thermal resistance between the solid state devices and an exterior of the package and matched coefficient of thermal expansion between the solid state devices and the materials used in packaging enables high power operation. The solid state devices are soldered between two layers of ceramic with metal traces that interconnect the devices and external contacts. This approach provides a simple method for assembling and encapsulating high power solid state devices.
- Inventors:
- Issue Date:
- Research Org.:
- Applied Pulsed Power, Inc., Ithaca, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1175606
- Patent Number(s):
- 6982482
- Application Number:
- 10/785,345
- Assignee:
- Applied Pulsed Power, Inc. (Ithaca, NY)
- Patent Classifications (CPCs):
-
H - ELECTRICITY H01 - BASIC ELECTRIC ELEMENTS H01L - SEMICONDUCTOR DEVICES
- DOE Contract Number:
- FG02-00ER82948
- Resource Type:
- Patent
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 42 ENGINEERING
Citation Formats
Glidden, Steven C., and Sanders, Howard D. Packaging of solid state devices. United States: N. p., 2006.
Web.
Glidden, Steven C., & Sanders, Howard D. Packaging of solid state devices. United States.
Glidden, Steven C., and Sanders, Howard D. Tue .
"Packaging of solid state devices". United States. https://www.osti.gov/servlets/purl/1175606.
@article{osti_1175606,
title = {Packaging of solid state devices},
author = {Glidden, Steven C. and Sanders, Howard D.},
abstractNote = {A package for one or more solid state devices in a single module that allows for operation at high voltage, high current, or both high voltage and high current. Low thermal resistance between the solid state devices and an exterior of the package and matched coefficient of thermal expansion between the solid state devices and the materials used in packaging enables high power operation. The solid state devices are soldered between two layers of ceramic with metal traces that interconnect the devices and external contacts. This approach provides a simple method for assembling and encapsulating high power solid state devices.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2006},
month = {1}
}
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