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Title: Digital-data receiver synchronization

Abstract

Digital-data receiver synchronization is provided with composite phase-frequency detectors, mutually cross-connected comparison feedback or both to provide robust reception of digital data signals. A single master clock can be used to provide frequency signals. Advantages can include fast lock-up time in moderately to severely noisy conditions, greater tolerance to noise and jitter when locked, and improved tolerance to clock asymmetries.

Inventors:
;
Issue Date:
Research Org.:
Oak Ridge National Laboratory (ORNL), Oak Ridge, TN (United States)
Sponsoring Org.:
USDOE
OSTI Identifier:
1175451
Patent Number(s):
6925135
Application Number:
10/722,274
Assignee:
UT-Battelle, LLC (Oak Ridge, TN)
Patent Classifications (CPCs):
H - ELECTRICITY H03 - BASIC ELECTRONIC CIRCUITRY H03L - AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
H - ELECTRICITY H04 - ELECTRIC COMMUNICATION TECHNIQUE H04J - MULTIPLEX COMMUNICATION
DOE Contract Number:  
AC05-00OR22725
Resource Type:
Patent
Country of Publication:
United States
Language:
English
Subject:
97 MATHEMATICS AND COMPUTING

Citation Formats

Smith, Stephen F., and Turner, Gary W. Digital-data receiver synchronization. United States: N. p., 2005. Web.
Smith, Stephen F., & Turner, Gary W. Digital-data receiver synchronization. United States.
Smith, Stephen F., and Turner, Gary W. Tue . "Digital-data receiver synchronization". United States. https://www.osti.gov/servlets/purl/1175451.
@article{osti_1175451,
title = {Digital-data receiver synchronization},
author = {Smith, Stephen F. and Turner, Gary W.},
abstractNote = {Digital-data receiver synchronization is provided with composite phase-frequency detectors, mutually cross-connected comparison feedback or both to provide robust reception of digital data signals. A single master clock can be used to provide frequency signals. Advantages can include fast lock-up time in moderately to severely noisy conditions, greater tolerance to noise and jitter when locked, and improved tolerance to clock asymmetries.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {Tue Aug 02 00:00:00 EDT 2005},
month = {Tue Aug 02 00:00:00 EDT 2005}
}