Multiinput and binary reproducible, high bandwidth floating point adder in a collective network
Abstract
To add floating point numbers in a parallel computing system, a collective logic device receives the floating point numbers from computing nodes. The collective logic devices converts the floating point numbers to integer numbers. The collective logic device adds the integer numbers and generating a summation of the integer numbers. The collective logic device converts the summation to a floating point number. The collective logic device performs the receiving, the converting the floating point numbers, the adding, the generating and the converting the summation in one pass. One pass indicates that the computing nodes send inputs only once to the collective logic device and receive outputs only once from the collective logic device.
 Inventors:
 Issue Date:
 Research Org.:
 International Business Machines Corp., Armonk, NY (United States)
 Sponsoring Org.:
 USDOE
 OSTI Identifier:
 1172141
 Patent Number(s):
 8977669
 Application Number:
 12/684,776
 Assignee:
 International Business Machines Corporation (Armonk, NY)
 Patent Classifications (CPCs):

G  PHYSICS G06  COMPUTING G06F  ELECTRIC DIGITAL DATA PROCESSING
 DOE Contract Number:
 B554331
 Resource Type:
 Patent
 Resource Relation:
 Patent File Date: 2010 Jan 08
 Country of Publication:
 United States
 Language:
 English
 Subject:
 97 MATHEMATICS AND COMPUTING
Citation Formats
Chen, Dong, Eisley, Noel A, Heidelberger, Philip, and SteinmacherBurow, Burkhard. Multiinput and binary reproducible, high bandwidth floating point adder in a collective network. United States: N. p., 2015.
Web.
Chen, Dong, Eisley, Noel A, Heidelberger, Philip, & SteinmacherBurow, Burkhard. Multiinput and binary reproducible, high bandwidth floating point adder in a collective network. United States.
Chen, Dong, Eisley, Noel A, Heidelberger, Philip, and SteinmacherBurow, Burkhard. Tue .
"Multiinput and binary reproducible, high bandwidth floating point adder in a collective network". United States. https://www.osti.gov/servlets/purl/1172141.
@article{osti_1172141,
title = {Multiinput and binary reproducible, high bandwidth floating point adder in a collective network},
author = {Chen, Dong and Eisley, Noel A and Heidelberger, Philip and SteinmacherBurow, Burkhard},
abstractNote = {To add floating point numbers in a parallel computing system, a collective logic device receives the floating point numbers from computing nodes. The collective logic devices converts the floating point numbers to integer numbers. The collective logic device adds the integer numbers and generating a summation of the integer numbers. The collective logic device converts the summation to a floating point number. The collective logic device performs the receiving, the converting the floating point numbers, the adding, the generating and the converting the summation in one pass. One pass indicates that the computing nodes send inputs only once to the collective logic device and receive outputs only once from the collective logic device.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2015},
month = {3}
}