Scheduler for multiprocessor system switch with selective pairing
Abstract
System, method and computer program product for scheduling threads in a multiprocessing system with selective pairing of processor cores for increased processing reliability. A selective pairing facility is provided that selectively connects, i.e., pairs, multiple microprocessor or processor cores to provide one highly reliable thread (or thread group). The method configures the selective pairing facility to use checking provide one highly reliable thread for high-reliability and allocate threads to corresponding processor cores indicating need for hardware checking. The method configures the selective pairing facility to provide multiple independent cores and allocate threads to corresponding processor cores indicating inherent resilience.
- Inventors:
- Issue Date:
- Research Org.:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1167015
- Patent Number(s):
- 8930752
- Application Number:
- 13/027,960
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- Patent Classifications (CPCs):
-
G - PHYSICS G06 - COMPUTING G06F - ELECTRIC DIGITAL DATA PROCESSING
- DOE Contract Number:
- B554331
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2011 Feb 15
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Gara, Alan, Gschwind, Michael Karl, and Salapura, Valentina. Scheduler for multiprocessor system switch with selective pairing. United States: N. p., 2015.
Web.
Gara, Alan, Gschwind, Michael Karl, & Salapura, Valentina. Scheduler for multiprocessor system switch with selective pairing. United States.
Gara, Alan, Gschwind, Michael Karl, and Salapura, Valentina. Tue .
"Scheduler for multiprocessor system switch with selective pairing". United States. https://www.osti.gov/servlets/purl/1167015.
@article{osti_1167015,
title = {Scheduler for multiprocessor system switch with selective pairing},
author = {Gara, Alan and Gschwind, Michael Karl and Salapura, Valentina},
abstractNote = {System, method and computer program product for scheduling threads in a multiprocessing system with selective pairing of processor cores for increased processing reliability. A selective pairing facility is provided that selectively connects, i.e., pairs, multiple microprocessor or processor cores to provide one highly reliable thread (or thread group). The method configures the selective pairing facility to use checking provide one highly reliable thread for high-reliability and allocate threads to corresponding processor cores indicating need for hardware checking. The method configures the selective pairing facility to provide multiple independent cores and allocate threads to corresponding processor cores indicating inherent resilience.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2015},
month = {1}
}
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