Performing a global barrier operation in a parallel computer
Abstract
Executing computing tasks on a parallel computer that includes compute nodes coupled for data communications, where each compute node executes tasks, with one task on each compute node designated as a master task, including: for each task on each compute node until all master tasks have joined a global barrier: determining whether the task is a master task; if the task is not a master task, joining a single local barrier; if the task is a master task, joining the global barrier and the single local barrier only after all other tasks on the compute node have joined the single local barrier.
- Inventors:
- Issue Date:
- Research Org.:
- International Business Machines Corp., Armonk, NY (United States)
- Sponsoring Org.:
- USDOE
- OSTI Identifier:
- 1165099
- Patent Number(s):
- 8,910,178
- Application Number:
- 13/206,581
- Assignee:
- International Business Machines Corporation (Armonk, NY)
- DOE Contract Number:
- B554331
- Resource Type:
- Patent
- Resource Relation:
- Patent File Date: 2011 Aug 10
- Country of Publication:
- United States
- Language:
- English
- Subject:
- 97 MATHEMATICS AND COMPUTING
Citation Formats
Archer, Charles J, Blocksome, Michael A, Ratterman, Joseph D, and Smith, Brian E. Performing a global barrier operation in a parallel computer. United States: N. p., 2014.
Web.
Archer, Charles J, Blocksome, Michael A, Ratterman, Joseph D, & Smith, Brian E. Performing a global barrier operation in a parallel computer. United States.
Archer, Charles J, Blocksome, Michael A, Ratterman, Joseph D, and Smith, Brian E. Tue .
"Performing a global barrier operation in a parallel computer". United States. https://www.osti.gov/servlets/purl/1165099.
@article{osti_1165099,
title = {Performing a global barrier operation in a parallel computer},
author = {Archer, Charles J and Blocksome, Michael A and Ratterman, Joseph D and Smith, Brian E},
abstractNote = {Executing computing tasks on a parallel computer that includes compute nodes coupled for data communications, where each compute node executes tasks, with one task on each compute node designated as a master task, including: for each task on each compute node until all master tasks have joined a global barrier: determining whether the task is a master task; if the task is not a master task, joining a single local barrier; if the task is a master task, joining the global barrier and the single local barrier only after all other tasks on the compute node have joined the single local barrier.},
doi = {},
journal = {},
number = ,
volume = ,
place = {United States},
year = {2014},
month = {12}
}
Save to My Library
You must Sign In or Create an Account in order to save documents to your library.
Works referenced in this record:
Configuring compute nodes of a parallel computer in an operational group into a plurality of independent non-overlapping collective networks
patent, March 2010
- Archer, Charles; Inglett, Todd; Ratterman, Joseph
- US Patent Document 7,673,011
Ultrascalable Petaflop Parallel Supercomputer
patent-application, January 2009
- Blumrich, Matthias A.; Chen, Dong; Chiu, George
- US Patent Document 11/768905; 20090006808
Mechanism For Process Migration On A Massively Parallel Computer
patent-application, March 2009
- Archer, Charles; Darrington, David; McCarthy, Patrick
- US Patent Application 11/853927; 20090067334
Message Flow Control in a Multi-Node Computer System
patent-application, December 2009
- Barsness, Eric L.; Darrington, David L.; Peters, Amanda
- US Patent Application 12/144783; 20090319621
Kernel-level single system image for petascale computing
journal, April 2006
- Ong, Hong; Vetter, Jeffrey; Studham, R. Scott
- ACM SIGOPS Operating Systems Review, Vol. 40, Issue 2
Real-Time Performance Monitoring, Adaptive Control, and Interactive Steering of Computational Grids
journal, November 2000
- Vetter, Jeffrey S.; Reed, Daniel A.
- The International Journal of High Performance Computing Applications, Vol. 14, Issue 4
Computing the Hough transform on a scan line array processor (image processing)
journal, March 1989
- Fisher, A. L.; Highnam, P. T.
- IEEE Transactions on Pattern Analysis and Machine Intelligence, Vol. 11, Issue 3
Coprocessor design to support MPI primitives in configurable multiprocessors
journal, April 2007
- Ziavras, Sotirios G.; Gerbessiotis, Alexandros V.; Bafna, Rohan
- Integration, the VLSI Journal, Vol. 40, Issue 3, p. 235-252
Interleaved all-to-all reliable broadcast on meshes and hypercubes
journal, May 1994
- Sunggu Lee, ; Shin, K. G.
- IEEE Transactions on Parallel and Distributed Systems, Vol. 5, Issue 5
Efficient algorithms for all-to-all communications in multiport message-passing systems
journal, January 1997
- Bruck, J.; Kipnis, S.
- IEEE Transactions on Parallel and Distributed Systems, Vol. 8, Issue 11